Fingerprint Sensor Package Structure Using Conductive Layer
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Solution Overview
Problem
Conventional fingerprint sensing package structures face issues with cracking due to TSVs positioned at the edge of the chip body, complicating the fabrication process and increasing costs and time, while the dry etching process for TSVs and insulating layers negatively impacts product yield.
Innovation Solution
A package structure and method that replace TSVs with conductive elements and a conductive layer, using a carrier with an encapsulant to expose the sensing surface of the electronic component and a portion of the conductive element, facilitating electrical connection and eliminating the need for dry etching and insulating layer processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If TSVs are positioned at the edge of the chip body to achieve electrical connection, then electrical connectivity is improved, but cracking occurs to the TSVs due to small thickness at the edge
Solution Approach 1:
The patent extracts the TSV structure from the edge position of the chip body and relocates it to the center region where the substrate has sufficient thickness. This removes the TSV from the harmful edge environment while preserving its electrical connection function, thereby preventing cracking while maintaining connectivity.
Solution Approach 2:
The patent changes the spatial arrangement by moving TSVs from a two-dimensional edge layout to a three-dimensional center region layout. This dimensional relocation allows TSVs to be positioned where the substrate provides adequate mechanical support, resolving the strength issue while maintaining electrical functionality.
2Reliability
If dry etching process is used to form TSVs and insulating layer is formed in TSVs to prevent leakage, then electrical isolation is improved, but fabrication process becomes complicated and product yield decreases
Solution Approach 1:
The patent extracts and removes the insulating layer formation step from the fabrication process. By eliminating this complex process step, the overall fabrication complexity is reduced and product yield is improved, while electrical isolation is maintained through alternative means such as substrate thickness or different structural designs.
Solution Approach 2:
The patent adopts a simpler, more disposable fabrication approach by eliminating the need for precise insulating layer formation. This reduces process complexity and improves yield, accepting that the insulating function is achieved through simpler, more robust means rather than complex layered structures.
3Reliability
If TSVs are formed by dry etching process to achieve vertical electrical connection, then electrical connectivity is improved, but fabrication time increases
Solution Approach 1:
The patent extracts the time-consuming dry etching process from the fabrication sequence. By removing this complex etching step, the overall fabrication time is significantly reduced while electrical connectivity is maintained through alternative simpler connection methods or structural designs.
Solution Approach 2:
The patent skips the complex dry etching process entirely, moving directly to simpler fabrication steps. This skipping of unnecessary complex processes reduces fabrication time while achieving the same electrical connection function through more efficient means.
Data Source
AI summary
A package structure and a method for fabricating the same are provided. An electronic component such as a sensing chip and a conductive element such as a bonding wire are mounted to a carrier, encapsulated by an encapsulant, and electrically connected through a conductive layer. As such, the electronic component can further be electrically connected to the carrier through the conductive layer and the conductive element. Therefore, the sensing chip can be packaged through current packaging processes, thereby reducing the fabrication cost, shortening the fabrication time and improving the product yield.