Fingerprint Sensor Conductive Pattern Planarization for Higher Sensitivity
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Solution Overview
Problem
Conventional fingerprint recognition systems face limitations in sensitivity and effectiveness due to the roughness of capacitive sensing surfaces, which can trap particles and reduce the effective sensing area, leading to suboptimal performance in identifying fingerprints.
Innovation Solution
The manufacturing process involves forming flat conductive patterns through a series of steps including redistribution structure formation, die encapsulation, and dielectric layer planarization, resulting in a fingerprint sensor with a larger effective sensing area and improved sensitivity by ensuring the conductive patterns' surfaces are flat and free from roughness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional capacitive sensing surfaces are used, then the manufacturing process is simple, but the surface roughness traps particles and reduces the effective sensing area, leading to reduced sensitivity and performance
Solution Approach 1:
The manufacturing process is divided into distinct stages: forming the capacitive sensing array structure, depositing the conductive layer, patterning the conductive patterns, and planarization. This segmentation allows each step to be optimized independently, achieving flat surfaces through systematic process breakdown rather than attempting to solve the entire complexity at once.
Solution Approach 2:
The patent applies planarization techniques during the manufacturing process to pre-establish flat surfaces before final assembly. This preliminary action ensures that particle trapping is prevented from the outset, rather than attempting to correct surface issues after manufacturing is complete.
2Area of stationary object
If the conductive patterns have rough surfaces, then the manufacturing process is simpler, but particles are trapped and the effective sensing area is reduced
Solution Approach 1:
The patent converts the potential harm of surface roughness by deliberately applying planarization processes that remove irregularities. This transforms what would be a detrimental rough surface into a beneficial flat surface, eliminating particle trapping while maintaining the conductive pattern's electrical functionality.
Solution Approach 2:
The surface topology parameter is changed from rough to flat through planarization processes. This parameter change directly increases the effective sensing area by eliminating valleys and irregularities where particles would be trapped, thereby improving fingerprint recognition reliability.
3Measurement precision
If flat conductive patterns are formed through planarization, then sensitivity and effective sensing area are improved, but the manufacturing process becomes more complex
Solution Approach 1:
The complex planarization process is segmented into manageable steps that can be integrated into existing manufacturing workflows. By breaking down the planarization into specific process stages, the patent makes the complexity more controllable and easier to implement in production environments.
Solution Approach 2:
The planarization process serves multiple functions: it flattens the surface for improved sensing, removes particles, and prepares the surface for subsequent manufacturing steps. This multi-functionality justifies the added manufacturing complexity by delivering multiple benefits from a single process integration.
Data Source
AI summary
A fingerprint sensor includes a die, a plurality of conductive structures, an encapsulant, a plurality of conductive patterns, a first dielectric layer, a second dielectric layer, and a redistribution structure. The die has an active surface and a rear surface opposite to the active surface. The conductive structures surround the die. The encapsulant encapsulates the die and the conductive structures. The conductive patterns are over the die and are electrically connected to the die and the conductive structures. Top surfaces of the conductive patterns are flat. The first dielectric layer is over the die and the encapsulant. A top surface of the first dielectric layer is coplanar with top surfaces of the conductive patterns. The second dielectric layer covers the first dielectric layer and the conductive patterns. The redistribution structure is over the rear surface of the die.