Finite Automata Processing for Wire-Speed Network Security
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Solution Overview
Problem
Current networking systems face challenges in processing and securing high-level network protocol layers (L4-L7) at wire-speed due to the limitations of general-purpose processors, particularly in content-aware applications like Intrusion Detection Systems that require complex pattern matching using regular expressions.
Innovation Solution
The implementation of a method that uses finite automata, specifically deterministic and non-deterministic finite automata, to efficiently search for regular expression patterns in input streams by optimizing memory access and processing cycles through the use of specialized hardware and speculative processing techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If general purpose processors are used to process L4-L7 network protocols, then intelligent processing capability is improved, but processing speed deteriorates and cannot achieve wire-speed forwarding
Solution Approach 1:
The system segments network protocol processing into two distinct paths: a fast path handled by specialized network processors for high-speed packet forwarding (L2-L3), and a slow path handled by general-purpose processors for intelligent application-layer processing (L4-L7). This segmentation allows each processor type to operate at its optimal speed without compromising the other, enabling wire-speed forwarding while maintaining intelligent processing capability for security applications.
2Measurement precision
If complex pattern matching using regular expressions is performed for intrusion detection, then detection accuracy is improved, but processing time increases and cannot achieve wire-speed inspection
Solution Approach 1:
The patent replaces traditional software-based regular expression pattern matching (mechanical processing) with hardware-accelerated finite automata engines that specialize in pattern recognition. These dedicated hardware components process intrusion detection patterns at wire-speed by transforming complex regular expressions into optimized state machines, eliminating the time-consuming software interpretation overhead while maintaining full detection accuracy.
Solution Approach 2:
The system transforms regular expression patterns into finite automata state machines, fundamentally changing the processing parameters from software-based string manipulation to hardware-optimized state transitions. This parameter change enables parallel processing of multiple patterns simultaneously and allows the system to inspect packet contents at wire-speed by pre-compiling patterns into efficient lookup tables and transition graphs that can be evaluated in constant time.
3Reliability
If content inspection is performed at wire-speed to detect security breaches, then real-time detection capability is improved, but system complexity increases due to the need for specialized processing
Solution Approach 1:
The patent merges multiple specialized components into an integrated network security processing system: finite automata engines for pattern matching, hardware accelerators for cryptographic operations, and packet inspection units are combined into a unified architecture. This consolidation reduces inter-component communication overhead and shared resource contention, achieving wire-speed real-time detection while managing system complexity through integrated design rather than distributed component coordination.
Data Source
AI summary
A method, and corresponding apparatus and system are provided for optimizing matching of at least one regular expression pattern in an input stream by storing a context for walking a given node, of a plurality of nodes of a given finite automaton of at least one finite automaton, the store including a store determination, based on context state information associated with a first memory, for accessing the first memory and not a second memory or the first memory and the second memory. Further, to retrieve a pending context, the retrieval may include a retrieve determination, based on the context state information associated with the first memory, for accessing the first memory and not the second memory or the second memory and not the first memory. The first memory may have read and write access times that are faster relative to the second memory.


