FinFET Source/Drain Regions Using Isotropic Etching and Epitaxial Growth
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Solution Overview
Problem
Conventional methods for forming source/drain regions in FinFET devices face issues such as adhesion problems, merging of adjacent regions, degradation of semiconductor material quality, and increased leakage current due to the epitaxial growth process, which also leads to non-uniform profiles and stress release.
Innovation Solution
A method involving the formation of a fin structure with a gate structure overlying it, where surface portions of the source and drain regions are reduced using an isotropic etching process, followed by epitaxial growth of a second semiconductor material, such as silicon germanium or silicon carbide, to form reduced source and drain regions with improved adhesion and reduced bridging issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If epitaxial growth is used to form source/drain regions in conventional FinFET devices, then the source/drain regions can be formed, but adhesion problems occur between the newly grown source/drain regions and the channel region
Solution Approach 1:
The patent applies preliminary action by forming a sacrificial layer in the source/drain regions before the epitaxial growth process. This sacrificial layer is removed subsequently, creating recesses that improve adhesion between the epitaxially-grown source/drain regions and the channel region. The preliminary formation of this layer addresses the adhesion problem that would otherwise occur during standard epitaxial growth.
2Ease of manufacture
If epitaxial growth is used to form source/drain regions, then the regions can be formed, but source/drain regions of adjacent devices may be merged or bridged
Solution Approach 1:
The patent uses preliminary action by forming a sacrificial layer in the source/drain regions before epitaxial growth. This layer is removed to create recesses that prevent the merging or bridging of source/drain regions between adjacent devices during the epitaxial growth process, thereby maintaining proper separation while still enabling region formation.
3Quantity of substance
If prolonged epitaxial process is used, then source/drain regions can be fully formed, but loading effect during film growth worsens, causing non-uniform source/drain profiles
Solution Approach 1:
The patent applies segmentation by dividing the source/drain region formation into two parts: the channel region maintains its original fin structure, while the source/drain regions have recesses formed by sacrificial layer removal. This segmentation allows the epitaxial growth to be more controlled and uniform, preventing the non-uniform profiles that would result from prolonged continuous growth.
4Ease of manufacture
If conventional epitaxial growth is used, then source/drain regions can be formed, but stress release occurs and anomalous leakage current is caused
Solution Approach 1:
The patent applies preliminary action by forming a sacrificial layer that is subsequently removed to create recesses in the source/drain regions. This preliminary structural modification prevents stress release during epitaxial growth and eliminates the conditions that would cause anomalous leakage current, thereby improving device reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the time and material needed for epitaxial growth, enhances the quality of the semiconductor device, and minimizes anomalous leakage current and non-uniform profiles, thereby improving the control over threshold voltage and reducing power consumption in semiconductor memory devices.
Implementation Method 1
removing a surface portion of the first semiconductor material from a top surface, a first and a second side surface, and an end surface of the source region and the drain region
Implementation Method 2
using epitaxial growth to form the source/drain regions that are attached to the channel regions
Data Source
AI summary
A semiconductor device includes a fin structure of a first semiconductor material on a substrate. The fin structure has a source region, a drain region, and a channel region between the source region and the drain region. The device also has a gate structure overlying the fin structure. The source region includes an inner portion of the first semiconductor material and an outer portion of a second semiconductor material overlying a top surface and side surfaces of the inner portion. The drain region includes an inner portion of the first semiconductor material and an outer portion of the second semiconductor material overlying a top surface and side surfaces of the inner portion.