FinFET Source/Drain Extension Stability via Epitaxial Repair
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Solution Overview
Problem
The existing methods for manufacturing FinFET structures face challenges in achieving stable source/drain extension regions due to surface defects from ion implantation and thermal treatment, leading to increased contact resistance and short channel effects.
Innovation Solution
A method involving the epitaxial growth of raised source/drain regions followed by lightly-doping ion implantation through the gate spacer, with adjustable implantation energy and dosage, to form source/drain extension regions, and subsequent annealing to repair damages and activate dopants, thereby improving the stability and reducing short channel effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ion implantation is performed to form source/drain extension regions, then doping is achieved, but surface defects (damages, cracks) are generated leading to increased contact resistance
Solution Approach 1:
The patent performs ion implantation to form the source/drain extension regions before the selective epitaxial growth of raised source/drain regions. This preliminary doping action allows the subsequent epitaxial growth to occur on a pre-doped substrate, and the epitaxial process itself helps repair the surface defects caused by implantation, thereby reducing contact resistance while maintaining the doping effect.
Solution Approach 2:
The patent utilizes the thermal treatment inherent in the selective epitaxial growth process to simultaneously achieve two goals: growing the raised source/drain regions and repairing the surface defects caused by ion implantation. The thermal energy that could potentially cause further damage is instead used to anneal and heal the surface cracks and damages, converting a harmful effect into a beneficial one.
2Productivity
If thermal treatment is applied during selective epitaxial growth, then epitaxial layers are grown, but junction depth diffuses seriously causing short channel effects
Solution Approach 1:
The patent performs the ion implantation to form source/drain extension regions before the selective epitaxial growth. By establishing the doping profile in advance, the subsequent thermal treatment during epitaxial growth does not significantly alter the junction depth because the dopants are already in place. The epitaxial growth primarily adds semiconductor material without causing serious diffusion of the previously implanted dopants.
Solution Approach 2:
The patent carefully controls the temperature and duration parameters of the selective epitaxial growth process to minimize dopant diffusion while achieving sufficient epitaxial layer growth. By optimizing these parameters, the process achieves a balance between growing the raised source/drain regions and maintaining precise junction depth control to suppress short channel effects.
3Ease of manufacture
If conventional ion implantation is performed first, then surface defects are generated, but subsequent epitaxial growth requires high quality surfaces
Solution Approach 1:
The patent performs ion implantation to form source/drain extension regions before the selective epitaxial growth of raised source/drain regions. This sequencing allows the implantation-induced surface defects to be present before epitaxial growth, and the subsequent epitaxial process to serve as a repair mechanism, thereby resolving the conflict between ease of doping and epitaxial layer quality.
Solution Approach 2:
The patent transforms the surface defects caused by ion implantation into an opportunity for the selective epitaxial growth process to demonstrate its repair capability. The epitaxial growth on the implanted regions provides a means to heal surface cracks and damages, converting the harmful effect of implantation into a beneficial pre-treatment that enhances the overall device quality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the stability of the LDD/SDE structure and mitigates short channel effects by controlling junction depth and doping distribution, resulting in improved electrical performance and reliability of the device.
Implementation Method 1
epitaxially growing raised source/drain regions on the fins
Implementation Method 2
performing lightly-doping ion implantation through the raised source/drain regions
Implementation Method 3
subsequent annealing to repair damages and activate dopants
Data Source
AI summary
A method for manufacturing a semiconductor device is provided. The method includes forming, on a substrate, a plurality of fins extending along a first direction; forming, on the fins, a dummy gate stack extending along a second direction; forming a gate spacer on opposite sides of the dummy gate stack in the first direction; epitaxially growing raised source/drain regions on the top of the fins on opposite sides of the gate spacer in the first direction; performing lightly-doping ion implantation through the raised source/drain regions with the gate spacer as a mask, to form source/drain extension regions in the fins on opposite sides of the gate spacer in the first direction; removing the dummy gate stack to form a gate trench; and forming a gate stack in the gate trench.