FinFET Anti-Punch Through Layer Formation via Epitaxial Growth

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Solution Overview

Problem

FinFET devices face challenges in achieving uniform characteristics and preventing damage to fins due to random dopant fluctuation and back-diffusion of anti-punch through layers during ion implantation, leading to short channel effects and punch through issues.

Innovation Solution

The formation of n-type and p-type anti-punch through layers by epitaxial growth or ion implantation, with precise control using masking techniques and selective formation to prevent overlap and ensure appropriate positioning, combined with the use of barrier layers and shallow trench isolation to maintain fin integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ion implantation is used to form anti-punch through layers, then short channel effects and punch through are reduced, but random dopant fluctuation occurs causing mismatches between fins and fin damage

Engineering Contradiction:
Improveshort channel effect controlVSAvoidAPT layer location control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent forms a sacrificial mandrel structure before fin formation, then uses this mandrel as a template to deposit the APT layer precisely where needed. After APT layer deposition, the mandrel is removed. This preliminary action ensures the APT layer is formed at the correct location without requiring ion implantation through the fin, thus avoiding random dopant fluctuation and fin damage while maintaining reliability benefits

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The sacrificial mandrel acts as an intermediary structure that enables precise APT layer formation. The mandrel is temporarily present during the deposition process to define the APT layer location, then removed afterward. This intermediary approach allows controlled APT layer placement without the harmful effects of direct ion implantation through the fin structure

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If ion implantation is performed to create APT layer, then dopant impurities are introduced, but back-diffusion into the fin occurs during high heat treatments

Engineering Contradiction:
Improvedopant concentrationVSAvoidfin composition stability
Core Design Contradiction:
Quantity of substanceVSStability of the object's composition

Solution Approach 1:

The sacrificial mandrel serves as a protective intermediary that prevents direct contact between the APT layer and the fin during high heat treatments. The mandrel is positioned between the APT layer and the fin, acting as a diffusion barrier. During subsequent heat treatment processes, the mandrel remains in place to block dopant diffusion, then is removed after the heat treatment is complete, leaving the fin composition intact

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the creation of FinFET devices with uniform characteristics and appropriately positioned anti-punch through layers, reducing short channel effects and punch through, thereby enhancing the reliability and performance of semiconductor devices.

Implementation Method 1

forming n-type and p-type anti-punch through layers by epitaxial growth

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Implementation Method 2

Anti-punch through (APT) layers are formed by ion implantation through the fin

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 3

forming a masking pattern over the fin material, the masking pattern defining covered portions and uncovered portions; etching the uncovered portions

Methodology Applied
Scientific EffectPhotolithographic patterning:

Implementation Method 4

etching the uncovered portions thereby removing the fin material, the n-type and p-type APT layers and extending into the substrate to form discrete fins

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS8497171B1FinFET method and structure with embedded underlying anti-punch through layer
Publication Date: 2013.07.30 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8497171B1 patent drawing
  • US8497171B1 patent drawing
  • US8497171B1 patent drawing

AI summary

Methods and structures for forming semiconductor FinFET devices with superior repeatability and reliability include providing APT (anti-punch through) layer accurately formed beneath a semiconductor fins, are provided. Both the n-type and p-type APT layers are formed prior to the formation of the material from which the semiconductor fin is formed. In some embodiments, barrier layers are added between the accurately positioned APT layer and the semiconductor fin. Ion implantation methods and epitaxial growth methods are used to form appropriately doped APT layers in a semiconductor substrate surface. The fin material is formed over the APT layers using epitaxial growth/deposition methods.