FinFET Shallow Trench Isolation Recess Uniformity
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Solution Overview
Problem
In FinFET devices, forming uniform shallow trench isolation (STI) recesses is challenging due to variations in fin height, STI gap filling material quality, and non-uniformity caused by patterning density and thermal constraints, leading to issues with contact resistance and device performance.
Innovation Solution
The method involves using a two-layer hard mask on FinFETs to planarize and polish the STI oxide, followed by selective etching to counteract etching non-uniformity and loading, and a wet etch process to achieve uniform oxide thickness in both dense and isolated regions, ensuring consistent recess formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional STI recess formation is used, then fin density can be increased, but uniformity of STI recess depth deteriorates due to variations in fin height and patterning density
Solution Approach 1:
The patent applies preliminary action by forming a planarization layer of oxide material over the fins before performing the etch process. This pre-formed layer compensates for fin height variations and ensures that the etch process starts from a uniform surface, thereby achieving uniform STI recess depth across dense fin regions and isolated regions.
Solution Approach 2:
The patent implements local quality by using a two-stage etch process with different etch selectivities. The first etch process uses a buffered HF solution with controlled concentration to etch the oxide layer, while the second etch process uses a different chemistry to complete the recess formation. This allows different etching conditions to be applied to different regions (dense vs. isolated) to achieve uniform results.
2Reliability
If thermal budget is reduced to maintain material quality, then device reliability improves, but STI recess uniformity deteriorates due to constrained thermal processing
Solution Approach 1:
The patent replaces thermal processing (mechanical/thermal system) with chemical processing. Instead of relying on high-temperature annealing to achieve uniform STI recesses, the invention uses chemically-enhanced etch processes with buffered HF solutions and controlled chemistries that can achieve uniform etching at lower temperatures, thus maintaining device reliability while achieving STI recess uniformity.
Solution Approach 2:
The patent applies parameter changes by modifying the chemical composition and concentration of etch solutions, as well as controlling etch time and temperature parameters. By adjusting these chemical parameters rather than relying on thermal parameters, the process achieves uniform STI recess formation under low thermal budget conditions that preserve material quality and device reliability.
3Productivity
If dense fin patterning is implemented, then device integration density increases, but etching non-uniformity and loading effects worsen
Solution Approach 1:
The patent applies preliminary action by depositing a planarization oxide layer before the etch process. This pre-formed uniform layer compensates for the loading effects and non-uniformities that arise during etching of dense fin structures, ensuring that the etch front encounters a uniform starting point across all regions.
Solution Approach 2:
The patent uses parameter changes by employing a two-stage etch process with different chemical compositions and concentrations. The first stage uses a buffered HF solution with specific concentration to handle the dense fin region etching, while the second stage completes the process with adjusted parameters, thereby compensating for loading effects and achieving uniform etching across high-density fin structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of uniform STI recesses, improving fin height/pitch control and device performance by reducing variations in contact resistance and DIBL, and maintaining material quality despite low thermal budgets.
Implementation Method 1
The oxide is polished, stopping on the hard mask layer on the at least two fins of the dense region, and removing more oxide in the isolated region, such that polishing results in forming a non-uniform oxide surface
Implementation Method 2
A wet etch process is performed to further recess the oxide in the dense region and the isolated region, such that a thickness of the oxide in the dense region and the isolated region is substantially uniform
Data Source
AI summary
Disclosed herein are processes and structures for uniform STI recessing. A method of making a semiconductor device includes initially forming a dense region of at least two fins on a substrate. The fins have a hard mask layer on a surface. The dense region with the fins is adjacent to an isolated region without fins within a distance of a pitch of the fins. An oxide is deposited on the dense and isolated regions. The oxide is polished, stopping on the hard mask layer on the fins, and removing more oxide in the isolated region. Polishing results in forming a non-uniform oxide surface. The hard mask layer is removed from the fins. An etch process is performed to further recess the oxide in the dense and isolated regions, such that a thickness of the oxide in the dense region and the isolated region is substantially uniform.