Fin HEMT with Doped SiGe Source/Drain for Reduced Scattering

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current semiconductor devices, such as FinFETs and HEMTs, face challenges with surface roughness scattering reducing electron mobility and high gate leakage currents, while HEMT processes are complex due to multiple materials used between source/drain and channel.

Innovation Solution

A method involving etching strained silicon into a pin structure, stacking undoped and doped SiGe, and forming a transistor element by sequentially adding oxide and gate metal, utilizing doped SiGe as source/drain to minimize surface roughness scattering and simplify the process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a multi-gate MOSFET or FinFET structure is used to enhance gate control power and suppress short-channel effect, then gate control power is improved, but electron mobility decreases due to surface roughness scattering

Engineering Contradiction:
Improvegate control powerVSAvoidelectron mobility
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent changes the material parameter by introducing SiGe alloy with different germanium content (x value) in the channel region. This material composition change modifies the crystal structure and reduces surface roughness scattering, thereby improving electron mobility while maintaining the multi-gate control structure

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies local quality by creating a graded SiGe channel where the germanium concentration varies spatially across the channel region. This gradual composition change reduces interface roughness and scattering effects locally, improving electron transport while preserving gate control

Inventive Principle:
Principle #3Local quality

2Speed

If a HEMT structure with quantum well channel is used to achieve high electron mobility, then electron mobility is improved, but gate leakage current increases

Engineering Contradiction:
Improveelectron mobilityVSAvoidgate leakage current
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The patent modifies the material parameters by using SiGe heterostructure with controlled bandgap differences. By adjusting the germanium composition and layer thickness, the energy barrier at the gate interface is optimized to reduce leakage current while maintaining high electron mobility in the channel

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs composite material structure combining SiGe channel with oxide barrier layers and metal gate. This composite structure creates multiple energy barriers that suppress gate leakage current while the SiGe quantum well maintains high electron mobility through material composition engineering

Inventive Principle:
Principle #40Composite materials

3Speed

If various materials including undoped spacer and channel material are inserted to fabricate quantum well in HEMT, then high electron mobility is achieved, but device complexity and parasitic resistance increase

Engineering Contradiction:
Improveelectron mobilityVSAvoidstructure complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent merges multiple functions into the doped SiGe layer by making it serve as both the quantum well channel material and the source/drain extension. This consolidation reduces the number of discrete material layers and interfaces, simplifying the overall device structure while maintaining the quantum well effect for high electron mobility

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The doped SiGe material performs multiple functions simultaneously: it forms the quantum well channel for high mobility, provides source/drain contact regions, and creates the necessary band structure for carrier confinement. This multi-functionality reduces device complexity by eliminating separate spacer and channel material layers

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9780198B2Method for manufacturing high-performance and low-power field effect transistor of which surface roughness scattering is minimized or removed
Publication Date: 2017.10.03 UNIST (ULSAN NAT INST OF SCI & TECH)
  • US9780198B2 patent drawing
  • US9780198B2 patent drawing
  • US9780198B2 patent drawing

AI summary

Aspects of the present invention relate to a method for manufacturing a high-performance and low-power field effect transistor (FET) element of which surface roughness scattering is minimized or removed, comprising: a first step of etching a strained silicon substrate into a pin structure; a second step of stacking undoped SiGe thereon; a third step of etching the undoped SiGe; a fourth step of etching after performing lithography; a fifth step of stacking doped SiGe thereon; a sixth step of etching the doped SiGe after performing lithography; and a step of forming a transistor element by sequentially stacking an oxide and a gate metal on the doped SiGe and there is an effect of enabling the implementation of a Fin HEMT capable of having all of good channel controllability and a high on-current, which are advantages of a FinFET, and high electron mobility, which is an advantage of an HEMT.