FinFET Isolation Trenches for Uniformity
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Solution Overview
Problem
The manufacturing of semiconductor devices, particularly FinFETs, faces challenges in minimizing deviations in electrical characteristics due to variations in trench pitches and device isolation layer thicknesses, which affect the performance of the devices.
Innovation Solution
A method involving the formation of first and second device isolating trenches at different pitches to define fin-shaped active regions and separate them into groups, with a second device isolating layer being formed to maintain uniformity and reduce deviations in electrical characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If first device isolating trenches are formed at a first pitch to define fin-shaped active regions, then fin structures are created, but deviations in electrical characteristics occur due to variations in trench pitch and isolation layer thickness
Solution Approach 1:
The device isolating trenches are divided into two sets: first trenches at a first pitch to define individual fin-shaped active regions, and second trenches at a second pitch to define fin groups. This segmentation allows independent control of fin formation and grouping, reducing the impact of pitch variations on electrical characteristics while maintaining manufacturing precision.
Solution Approach 2:
Different trench pitches are applied in different spatial locations: the first pitch defines the local fin structure geometry, while the second pitch defines the grouping pattern. This local differentiation enables optimization of each level independently, reducing overall deviation in electrical characteristics while maintaining uniform fin formation.
2Reliability
If second trenches are formed at a second pitch greater than the first pitch to define fin groups, then fin groups are created with reduced electrical characteristic deviations, but device complexity increases
Solution Approach 1:
The formation of second trenches to define fin groups merges the function of group definition with the existing isolation structure. By using a second device isolating layer filled in second trenches that align with fin group boundaries, the patent combines multiple functions (isolation and grouping) into a unified structure, reducing overall device complexity despite the additional trench formation step.
Data Source
AI summary
A method of manufacturing a semiconductor device includes forming a plurality of fins by forming a plurality of first device isolating trenches repeated at a first pitch in a substrate, forming a plurality of fin-type active areas protruding from a top surface of a first device isolating layer by forming the first device isolating layer in the plurality of first device isolating trenches, forming a plurality of second device isolating trenches at a pitch different from the first pitch by etching a portion of the substrate and the first device isolating layer, and forming a second device isolating layer in the plurality of second device isolating trenches, so as to form a plurality of fin-type active area groups separated from each other with the second device isolating layer therebetween.