FinFET Dummy Gate Void Elimination via Deposition-Etch

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

As semiconductor process technology advances beyond the sub-20 nm node, conventional methods struggle with forming sacrificial dummy gate layers in finFETs with high aspect ratio trenches, leading to voids and reduced manufacturing yield, and require costly precursor gases.

Innovation Solution

A method is developed to form a sacrificial dummy gate layer that is substantially free from voids by using a deposition-etch process, which involves forming a first dummy gate layer, etching to create a tapered trench, and filling it with conductive material, allowing for better gap-filling capabilities and eliminating voids, while avoiding the use of silane, disilane, and dichlorosilane gases.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional deposition methods are used to form sacrificial dummy gate layer in high aspect ratio trenches, then the process is simple and cost-effective, but voids are formed in the gate layer reducing manufacturing yield

Engineering Contradiction:

Improvevoid-free gate layer formationVSAvoiddeposition-etch process complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The gate layer formation is segmented into multiple deposition-etch cycles rather than a single deposition step. Each cycle deposits a portion of the gate material, then etches back to remove excess material and expose voids. This segmentation allows progressive filling of high aspect ratio trenches while eliminating void formation that would occur in conventional single-step deposition.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The etching step is performed preliminarily after each deposition cycle to prevent void formation before subsequent deposition. By etching away excess material and exposing any formed voids early, the process prepares the surface for better material adhesion and uniform distribution in the next deposition cycle, ultimately achieving void-free gate layers.

Inventive Principle:

Principle #10Preliminary action

2Reliability

If silane, disilane, and dichlorosilane gases are used in deposition, then good film quality is achieved, but manufacturing costs increase significantly

Engineering Contradiction:

Improvefilm qualityVSAvoidcostly precursor gases

Core Design Contradiction:

ReliabilityVSQuantity of substance

Solution Approach 1:

The process replaces expensive precursor gases (silane, disilane, dichlorosilane) with cheaper alternative gases that can achieve sufficient film quality when used in the multi-cycle deposition-etch process. The temporary use of less expensive materials is acceptable because the iterative deposition-etch cycles compensate for any minor quality deficiencies, ultimately producing high-quality gate layers without the high cost of premium precursors.

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The deposition parameters are changed to accommodate alternative gases. By adjusting deposition conditions and using the deposition-etch cycle, the process achieves comparable film quality with different gas chemistry, reducing dependence on expensive precursor gases while maintaining reliable film formation in high aspect ratio trenches.

Inventive Principle:

Principle #35Parameter changes

3Ease of manufacture

If existing tools and processes are used, then manufacturing cost is reduced, but void formation occurs in high aspect ratio trenches

Engineering Contradiction:

Improvetool compatibilityVSAvoidgate layer uniformity

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The process transforms the static single-step deposition into a dynamic multi-cycle deposition-etch process. By making the fabrication process iterative and adaptive, existing tools can achieve better results in high aspect ratio trenches. The dynamic cycling allows the process to self-correct void formation issues that would be problematic in a single static deposition step, maintaining tool compatibility while improving gate layer uniformity.

Inventive Principle:

Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves manufacturing yield by reducing voids in the sacrificial dummy gate layer and maintains compatibility with existing tools and processes, thereby reducing costs and enhancing semiconductor device production efficiency.

Implementation Method 1

depositing a second conductive material in the trench, the second conductive material and the remaining portion of the first conductive material forming a dummy gate layer

Methodology Applied

Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 2

depositing a second conductive material in the trench

Methodology Applied

Scientific EffectChemical Vapour Deposition: Chemical Vapour Deposition

Data Source

PatentUS10115639B2FinFET device and method of forming the same

Publication Date: 2018.10.30 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A method may include depositing a first conductive material in an opening disposed between a first semiconductor structure and a second semiconductor structure, the first conductive material comprising at least one first void. The method further includes removing a portion of the first conductive material to form a trench, the trench exposing the at least one first void and being defined by a remaining portion of the first conductive material; and depositing a second conductive material in the trench, the second conductive material and the remaining portion of the first conductive material forming a dummy gate layer.