FinFET Gate Stack Conformal Doping via Thermal Fluorine Treatment

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Solution Overview

Problem

Existing techniques for incorporating fluorine into FinFET devices, such as ion implantation, damage the fins and fail to provide uniform fluorine distribution across the three-dimensional geometry, leading to ineffective defect reduction and degraded device performance.

Innovation Solution

A thermal fluorine treatment process is used to form a fluorinated layer in the FinFET gate stack, allowing for conformal doping and uniform distribution of fluorine atoms, avoiding the damage caused by ion implantation and ensuring consistent passivation of interfacial and bulk defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If ion implantation is used to incorporate fluorine into FinFET devices, then fluorine can be introduced into the device structure, but the FinFET fins are damaged and fluorine distribution is non-uniform

Engineering Contradiction:
Improvefluorine incorporationVSAvoidfin damage
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent replaces the mechanical ion implantation process with a chemical vapor deposition (CVD) process. Instead of physically bombarding the structure with fluorine ions, fluorine is introduced through chemical reactions in a vapor phase, allowing fluorine incorporation without mechanical damage to the fins. The CVD process uses fluorine-containing precursors that decompose and deposit fluorine atoms conformally on the fin surfaces.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent introduces a capping layer as an intermediary between the fluorine source and the FinFET fins. This capping layer serves as a protective barrier that prevents direct damage to the fins while allowing controlled fluorine diffusion. The capping layer mediates the fluorine incorporation process, enabling uniform fluorine distribution without exposing the delicate fin structures to harsh implantation conditions.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If ion implantation is used to incorporate fluorine into FinFET devices, then fluorine can be introduced, but uniform distribution across the three-dimensional geometry is not achieved

Engineering Contradiction:
Improvefluorine incorporationVSAvoidfluorine distribution uniformity
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The CVD process replaces mechanical ion implantation with a chemical vapor deposition mechanism that naturally conforms to three-dimensional surfaces. The vapor-phase fluorine precursors can access and deposit on all surfaces of the fin structures uniformly, including sidewalls and top surfaces, achieving consistent fluorine distribution throughout the complex 3D geometry without the shadowing effects inherent in ion implantation.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent extracts the fluorine incorporation step from the damaging ion implantation process and separates it into a distinct CVD process. By taking out the fluorine introduction mechanism from the mechanical implantation context and placing it in a chemical deposition context, uniform fluorine distribution is achieved independently of the fin structure's three-dimensional complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

3Loss of energy

If high-K dielectric materials are used to reduce gate oxide leakage current, then gate capacitance can be maintained, but interfacial and bulk defects increase carrier scattering and degrade mobility

Engineering Contradiction:
Improvegate oxide leakage currentVSAvoidcarrier mobility
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent applies local quality by introducing fluorine specifically at the interfaces between the high-K dielectric and the semiconductor substrate. This localized fluorine incorporation targets the interfacial defects that cause carrier scattering, while maintaining the bulk high-K dielectric properties that provide low leakage current. The fluorine enrichment at critical interfaces improves carrier mobility without compromising the energy storage capability of the high-K dielectric.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent converts the harmful effect of interfacial defects into a benefit by using fluorine passivation. The fluorine atoms bond with dangling bonds and defect sites at the high-K dielectric interfaces, transforming these previously harmful defect states into beneficial passivated states that reduce carrier scattering. This converts the inherent defect problem of high-K dielectrics into an opportunity to improve interface quality and enhance device performance.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The thermal fluorine treatment method effectively passivates defects and improves device performance by ensuring uniform fluorine distribution across the FinFET fin structure, enhancing gate stack integrity and reducing oxide leakage current.

Implementation Method 1

A thermal fluorine treatment process is used to form a fluorinated layer in the FinFET gate stack, allowing for conformal doping and uniform distribution of fluorine atoms

Methodology Applied
Scientific EffectChemical Vapour Deposition: Chemical Vapour Deposition

Implementation Method 2

an anneal is performed to drive at least some of the plurality of fluorine atoms into the gate stack, thereby conformally doping the interfacial and high-K dielectric layers

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 3

fluorine atoms have been shown to effectively passivate interfacial dangling bonds and bulk oxygen vacancies, which in turn may reduce oxide leakage current, improve threshold voltage stability, and generally improve device performance

Methodology Applied
Scientific EffectChemical Bonding: Chemical Bonding

Data Source

PatentUS10276399B2FinFET doping methods and structures thereof
Publication Date: 2019.04.30 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10276399B2 patent drawing
  • US10276399B2 patent drawing
  • US10276399B2 patent drawing

AI summary

A method and structure for providing conformal doping of FinFET fin structures, for example by way of a thermal treatment process, includes forming a gate stack at least partially over a fin extending from a substrate. In various embodiments, a barrier metal layer is deposited over the gate stack. By way of example, a thermal fluorine treatment is performed, where the thermal fluorine treatment forms a fluorinated layer within the barrier metal layer, and where the fluorinated layer includes a plurality of fluorine atoms. In some embodiments, after forming the fluorinated layer, an anneal is performed to drive at least some of the plurality of fluorine atoms into the gate stack (e.g., into the interfacial layer and the high-K dielectric layer), thereby conformally doping the gate stack with the at least some of the plurality of fluorine atoms.