FinFET Fin Formation via Mandrel Oxidation and Selective Etching

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Solution Overview

Problem

The integration of alternative semiconductor materials with silicon substrates for FinFET devices is challenging due to lattice constant differences, leading to difficulties in enhancing performance capabilities and reliability, particularly in reducing short channel effects and increasing drive current density.

Innovation Solution

A novel mandrel oxidation process is employed to form fins for FinFET devices, involving the formation of a mandrel structure, oxidation of its sidewalls, removal of oxidized regions, and selective etching to expose the fins, allowing for the growth of epitaxial semiconductor material and the formation of a final gate structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If alternative semiconductor materials are integrated with silicon substrates, then performance capabilities and reliability are enhanced, but lattice constant differences cause manufacturing difficulties

Engineering Contradiction:
Improvedevice reliabilityVSAvoidmanufacturing difficulty
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent introduces a mandrel structure as an intermediary element that facilitates the integration of alternative semiconductor materials with silicon substrates. The mandrel serves as a template or mediator during the fin formation process, enabling controlled epitaxial growth of III-V materials on silicon without direct lattice mismatch issues. This intermediary approach allows the alternative materials to be integrated while managing the lattice constant differences through the mandrel's structural guidance.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If channel length is decreased to improve switching speed, then operating speed increases, but short channel effects are enhanced

Engineering Contradiction:
Improveswitching speedVSAvoidshort channel effect control
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent transitions from planar FET architecture to FinFET three-dimensional structure. By forming vertical fins with sidewalls that extend upward from the substrate, the channel is no longer a simple planar layer but a three-dimensional structure with increased surface area. This dimensional change allows the gate to control the channel from multiple directions (front, back, and sidewalls), providing superior electrostatic control that compensates for the reduced channel length and mitigates short channel effects while maintaining high switching speed.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If fin height is increased to improve gate electrostatic control, then drive current density increases, but manufacturing precision requirements increase

Engineering Contradiction:
Improvegate electrostatic controlVSAvoidfin formation precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent performs preliminary actions by first forming the mandrel structure with precise dimensions before proceeding to fin formation. The mandrel is created with controlled height and width parameters that pre-determine the final fin geometry. By establishing the mandrel structure in advance with precise dimensions through lithography and etching, the subsequent epitaxial growth and fin formation processes inherit this precision, making it easier to achieve the required fin height and width tolerances for optimal gate electrostatic control.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method effectively reduces short channel effects and enhances drive current density by forming high-quality fins with improved gate electrostatic control, enabling better performance and reliability in FinFET devices.

Implementation Method 1

performing an oxidation process to oxidize at least a portion of the mandrel structure to thereby define oxidized regions on the sidewalls of the mandrel structure

Methodology Applied
Scientific EffectOxidation: Oxidation

Implementation Method 2

forming a plurality of fins on the reduced thickness mandrel structure, wherein the fins are comprised of an epitaxially grown semiconductor material

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS8716156B1Methods of forming fins for a FinFET semiconductor device using a mandrel oxidation process
Publication Date: 2014.05.06 GLOBALFOUNDRIES US INC
  • US8716156B1 patent drawing
  • US8716156B1 patent drawing
  • US8716156B1 patent drawing

AI summary

One illustrative method disclosed herein includes forming a mandrel structure above a semiconductor substrate, performing an oxidation process to oxidize at least a portion of the mandrel structure so as to thereby define oxidized regions on the mandrel structure, removing the oxidized regions to thereby defined a reduced thickness mandrel structure, forming a plurality of fins on the reduced thickness mandrel structure and performing an etching process to selectively remove at least a portion of the reduced thickness mandrel structure so as to thereby expose at least a portion of each of the fins.