FinFET Stem Region Segmentation for Gate Control

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Solution Overview

Problem

The semiconductor industry faces challenges in fabricating gate structures for finFET devices, particularly in achieving greater control over the gate and overcoming processing difficulties in forming gate-all-around and quasi-surround architectures, especially on silicon-on-insulator substrates.

Innovation Solution

A method for fabricating finFET devices involves forming a stem region with a reduced width in the fin structure, which can be etched or oxidized, and a gate structure that wraps around the fin, providing improved control over the channel region, including omega-gate or quasi-surround configurations, to enhance subthreshold slope and Ion/Ioff ratio.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If gate-all-around or omega/quasi-surround architecture is used to achieve greater gate control, then gate control over the channel is improved, but fabrication complexity and processing challenges increase substantially

Engineering Contradiction:
Improvegate controlVSAvoidfabrication complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The fin structure is segmented into distinct regions: a stem region with first semiconductor material and a channel region with second semiconductor material. This segmentation allows different materials to be used in different regions to achieve desired electrical characteristics while simplifying the gate structure fabrication process compared to complete gate-all-around architectures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different semiconductor materials are used in different regions of the fin structure. The stem region uses first semiconductor material while the channel region uses second semiconductor material, allowing local optimization of electrical properties without requiring complex gate-all-around fabrication processes.

Inventive Principle:
Principle #3Local quality

2Reliability

If gate-all-around or omega/quasi-surround architecture is implemented, then control over the channel is enhanced, but processing challenges on silicon-on-insulator substrates increase

Engineering Contradiction:
Improvechannel controlVSAvoidprocessing ease
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The fin is divided into a stem region and a channel region with different semiconductor materials. This segmentation enables improved channel control through material differentiation while avoiding the substantial processing challenges associated with complete gate-all-around architectures on silicon-on-insulator substrates.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of using a complete gate-all-around architecture that wraps entirely around the fin structure, the invention uses a gate structure that primarily controls the channel region while the stem region uses different material properties to contribute to overall device performance, inverting the conventional approach of uniform gate coverage.

Inventive Principle:
Principle #13The other way round (Inversion)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method improves the subthreshold slope and Ion/Ioff ratio, allowing for lower supply voltage and reduced power consumption, while also enhancing the performance of the finFET device by reducing Ioff and improving saturation subthreshold slope and drain-induced-barrier-lowering.

Implementation Method 1

etching the first region to decrease its width

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

oxidizing the first region or portion thereof to decrease the width of the conductive material portion of the first region

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS11133404B2FinFET device including a stem region of a fin element
Publication Date: 2021.09.28 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11133404B2 patent drawing
  • US11133404B2 patent drawing
  • US11133404B2 patent drawing

AI summary

A finFET device having a substrate and a fin disposed on the substrate. The fin includes a passive region, a stem region overlying the passive region, and an active region overlying the stem region. The stem region has a first width and the active region has a second width. The first width is less than the second width. The stem region and the active region also have different compositions. A gate structure is disposed on the active region.