Symmetric-Coefficient FIR Filter With Shared Lookup Table
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Solution Overview
Problem
Existing FIR filters face challenges in reducing circuit size due to large multiplication circuits and increasing table sizes with the number of taps, despite employing symmetric filter coefficients and variance calculation methods.
Innovation Solution
An FIR filter design that generates address signals for a table storing shared computation results from multiplying symmetric filter coefficients, allowing for cumulative additions using a reduced table size, optimizing circuit size by associating address values with computation results indicating the same values across multiple patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of taps in FIR filter is increased to improve processing performance, then processing performance is improved, but circuit size is dramatically increased
Solution Approach 1:
The patent merges multiple multiplication operations into a single multiplication circuit by exploiting the symmetric property of filter coefficients. When coefficients have symmetric property, the number of multiplication circuits can be reduced, and multiple multiplication results can be shared through a common table, thereby improving processing performance without proportionally increasing circuit size
Solution Approach 2:
The patent segments the computation results into multiple patterns (2 to the power of k patterns) and stores them in a table with shared entries. By dividing the computation into manageable patterns and sharing common results, the circuit can handle increased number of taps without linearly increasing the size of multiplication circuits
2Device complexity
If symmetric filter coefficients are used to reduce the number of multiplication circuits, then the number of multiplication circuits is reduced, but the size of each multiplication circuit becomes large
Solution Approach 1:
The patent creates a table that stores pre-computed results and their patterns. Instead of performing full multiplications in hardware, the system copies and retrieves pre-stored computation results from the table based on input patterns, thereby reducing the size of multiplication circuits while maintaining computational accuracy
Solution Approach 2:
The patent performs preliminary computation by pre-calculating and storing computation results in a table before actual filter processing. This preliminary action allows the multiplication circuits to be smaller since they only need to retrieve and combine pre-computed values rather than performing complete multiplications in real-time
Data Source
AI summary
An FIR filter includes: an address signal generation unit configured to generate an address signal of an address value in accordance with k bit values that correspond to k filter coefficients having a symmetric property; and an extraction unit configured to extract a computation result that corresponds to the address value indicated by the address signal from the table, in which, in the table, a plurality of computation results in which sets of computation results indicating the same values among 2 to the power of k patterns of computation results which are obtained by adding up k results of multiplication, the k results of multiplication being results obtained by multiplying each of k filter coefficients having a symmetric property by each of k bit values that correspond to k filter coefficients are commonly shared, and the plurality of address values are associated with each other.