FIR Filtering in Motion Estimation via RAM Crossbar Address Translation
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Solution Overview
Problem
Conventional video coding architectures struggle to efficiently meet the performance requirements of various video coding standards, such as providing both vertical and horizontal filtering, edge replication, and coordinate swapping, during motion compensation due to difficulties in presenting appropriate data to the appropriate data paths.
Innovation Solution
A system utilizing an array of random access memories (RAMs), crossbars, and address translation for efficient data mapping, allowing simultaneous processing of multiple FIR filtering operations in a SIMD block, enabling the presentation of both rows and columns of data, edge replication, and coordinate swapping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a SIMD structure is used to execute multiple FIR filtering operations in parallel, then processing throughput is improved, but the ability to efficiently present appropriate data to appropriate data paths deteriorates
Solution Approach 1:
The system segments the 2D block of pixel data into multiple independent data paths, where each path can process different portions of the data simultaneously. The crossbar switch divides the data flow into multiple lanes that can be independently controlled and routed to different processing units, enabling parallel FIR filtering operations while maintaining efficient data presentation to each path.
Solution Approach 2:
The crossbar switch acts as an intermediary between the data source and the multiple data paths. It receives the 2D block of pixel data and intelligently routes different portions to appropriate processing units based on the required operations (vertical filtering, horizontal filtering, edge replication, coordinate swapping). This mediator enables flexible data distribution without compromising parallel processing throughput.
2Productivity
If filter folding is applied to compute 2 taps per clock using a MAC element, then computational efficiency is improved, but data access complexity increases due to requiring two unrelated reads
Solution Approach 1:
The system merges the data access operations by reorganizing the memory structure to store pixel data such that related samples required for folded filter computation are located in adjacent memory locations. This allows the crossbar switch to efficiently retrieve two unrelated reads in a single memory access cycle, maintaining MAC element utilization for computing 2 taps per clock while reducing data access complexity through spatial locality optimization.
3Adaptability or versatility
If multiple data paths are provided for vertical and horizontal filtering, then filtering capability is improved, but control logic overhead increases
Solution Approach 1:
The system implements universal data paths that can perform both vertical and horizontal filtering operations. The same data path infrastructure is used for different filtering directions by changing the data routing configuration through the crossbar switch and adjusting the filter coefficients. This multi-functional approach enables multiple filtering capabilities while minimizing control logic overhead, as the hardware structure remains constant and only the configuration changes.
Data Source
AI summary
A system for performing finite input response filtering. The system includes an array of random access memories (RAMs) for storing at least one two-dimensional (2D) block of pixel data. The pixel data is stored such that one of each type of column or row from the 2D block of pixel data is stored per RAM. A control block provides address translation between the 2D block of pixel data and corresponding addresses in the array of RAMs. An input crossbar writes pixel data to the array of RAMs as directed by the control block. An output crossbar simultaneously reads pixel data from each of the array of RAMs and passes the data to an appropriate replicated data path, as directed by the control block. A single instruction multiple data path block includes a plurality of replicated data paths for simultaneously performing the FIR filtering, as directed by the control block.