Firmware Data Prioritization for Faster Memory Boot-Up

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Solution Overview

Problem

Memory systems experience increased latency during boot-up procedures due to the slow data transfer from triple-level cells (TLCs) used for storing firmware images, which can be mitigated by prioritizing data storage in single-level cells (SLCs) and pre-fetching data to a buffer before read commands are received.

Innovation Solution

Implementing a memory system that identifies high-priority data, such as firmware images, and stores it in SLCs, while transferring it to a buffer before read commands are received, thereby reducing latency by utilizing faster SLCs for critical data access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If firmware images are stored in triple-level cells (TLCs) to increase storage capacity, then storage density is improved, but data transfer speed deteriorates causing increased latency during boot-up procedures

Engineering Contradiction:
Improvestorage capacityVSAvoiddata transfer speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The patent segments the storage system into two distinct memory types: TLCs for bulk storage capacity and SLCs for high-speed data access. By dividing the storage function across different memory technologies with complementary characteristics, the system achieves both high storage density and fast data retrieval for boot-up operations

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a buffer as an intermediary component between TLCs and the processor. The buffer acts as a mediator that receives data from TLCs and provides it to the processor at high speed, effectively decoupling the slow storage medium from the fast processing requirements during boot-up procedures

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of time

If data is transferred from TLCs to buffer during boot-up, then boot-up latency is reduced, but system complexity increases due to additional data management requirements

Engineering Contradiction:
Improveboot-up latencyVSAvoiddata management complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent implements preliminary action by pre-positioning boot-up data in the buffer before the processor needs it. The system proactively transfers firmware images from TLCs to the buffer during initialization, so that when the processor requires this data during boot-up, it is already available in high-speed memory, thereby reducing latency without requiring complex runtime data management

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250383818A1Data prioritization for boot-up procedures
Publication Date: 2025.12.18 MICRON TECHNOLOGY INC
  • US20250383818A1 patent drawing
  • US20250383818A1 patent drawing
  • US20250383818A1 patent drawing

AI summary

Methods, systems, and devices for data prioritization for boot-up procedures are described. A host system may include a parameter in a write command indicating a priority level associated with data, such as data associated with a firmware image. A memory system may identify the parameter in the write command and store or maintain the data in memory cells of a first type after a memory management operation. For example, the memory system may either refrain from transferring the data after the memory management operation or transfer the data to different memory cells of the first type. The memory system may prefetch the data by preemptively moving the data to a buffer, such as prior to receiving a read command. After a read command for the data is received, the data may be transferred from the buffer to the host system to satisfy the command.