Non-Volatile Memory Firmware Data Reconstruction via Logical Parity Arrays
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Solution Overview
Problem
Non-volatile memory systems face challenges in quickly correcting corrupted data, as existing methods like error correction codes (ECCs) are time-consuming and inefficient, especially in cases of clustered errors, and physical organization of data groups in RAID systems can introduce design restrictions that slow down memory systems.
Innovation Solution
A method that organizes data logically into multidimensional data group arrays and generates parity bit groups using logical operations, allowing for faster data reconstruction by using parity bits to manage corrupted data without the need for physical separation of data groups.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction codes (ECCs) are used to reconstruct corrupted data, then data reliability is improved, but the time required for data reconstruction increases
Solution Approach 1:
The patent divides data into multiple data groups and distributes them across different storage locations. By segmenting data and using parity bits for each segment, the system can reconstruct corrupted data faster without requiring complex ECC computations on the entire data set.
Solution Approach 2:
The patent uses parity bits as a simpler, faster alternative to full ECC codes for data reconstruction. While parity bits provide less comprehensive error correction than ECC, they offer a quick reconstruction mechanism that reduces time loss, making them suitable for scenarios where speed is critical.
2Reliability
If data are physically divided into data groups and stored separately as in RAID, then data reconstruction capability is improved, but device complexity and design restrictions increase
Solution Approach 1:
The patent introduces a logical organization dimension by arranging data groups in a two-dimensional array structure with rows and columns. This logical arrangement allows parity bits to be generated and applied without requiring physical separation of data groups, thus reducing device complexity while maintaining reconstruction capability.
Solution Approach 2:
The patent creates parity bit groups that are logical copies derived from the data groups through XOR operations. These parity copies enable data reconstruction without needing physical redundancy or complex RAID-like structures, simplifying the overall system design.
3Reliability
If data are organized physically in separated data groups, then error correction capability is improved, but reading speed decreases
Solution Approach 1:
The patent pre-organizes data into a logical two-dimensional array structure and pre-generates parity bit groups during the data writing phase. This preliminary organization allows for rapid data retrieval and reconstruction during reading operations, as the structural framework is already in place and does not require real-time computation.
4Stability of the object's composition
If firmware is stored in non-volatile memory, then data persistence is improved, but firmware loading time increases
Solution Approach 1:
The patent divides firmware into multiple data groups with associated parity bits, enabling selective and parallel reading of firmware segments during the boot process. This segmentation allows the system to reconstruct firmware data more quickly by utilizing the pre-organized logical structure and parity information, reducing overall loading time while maintaining data persistence.
Data Source
AI summary
A portion of data stored in a non-volatile memory may be found to be corrupted when it is read. Where parity data is generated from portions of data and parity data is stored with the portions of data, the corrupted data may be reconstructed from the parity data and uncorrupted portions of data.


