Firmware Lockstep Recovery for Processor Availability

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Solution Overview

Problem

Current systems face challenges in responding to detected loss of lockstep between processors without crashing the system, particularly in large multi-processor systems where cosmic events lead to frequent errors, and existing solutions require significant OS customization or prolonged processor unavailability.

Innovation Solution

Firmware is used to detect loss of lockstep, idle processors, recover lockstep, and reintroduce them to the operating system without requiring OS-specific knowledge, utilizing ACPI methods and a hot spare processor for the boot processor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional error detection methods (parity/ECC) are used in execution core, then data corruption can be detected in caches and memory, but the execution core remains unprotected and corrupted data can propagate through the system

Engineering Contradiction:
ImproveSDC detection capabilityVSAvoidprocessor structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges two identical processors into a lockstep pair where both execute the same instructions simultaneously and their results are compared. This combination provides execution core protection without requiring complex internal changes to each individual processor, as the redundancy is achieved through pairing rather than internal restructuring.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system performs preliminary error detection by comparing outputs from two processors before the corrupted data can propagate through the system. The lockstep comparison mechanism detects discrepancies early in the execution pipeline, preventing corrupted results from being committed to memory or transmitted through buses.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If lockstep processing is implemented to detect errors in execution core, then SDC detection is improved, but system availability decreases due to frequent crashes from cosmic events

Engineering Contradiction:
ImproveSDC detection capabilityVSAvoidsystem availability
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs preliminary error detection by comparing outputs from two processors before the corrupted data can propagate through the system. The lockstep comparison mechanism detects discrepancies early in the execution pipeline, preventing corrupted results from being committed to memory or transmitted through buses.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces firmware as an intermediary layer between the hardware error detection mechanism and the operating system. This firmware layer handles error recovery operations (such as resetting individual processors or switching to backup processors) without requiring OS crashes, thereby maintaining system availability while preserving the reliability benefits of lockstep processing.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If OS customization is implemented to handle lockstep recovery, then processor availability can be maintained, but the burden of processor and platform-specific knowledge increases significantly

Engineering Contradiction:
Improveprocessor availabilityVSAvoidOS customization burden
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces firmware as an intermediary layer between the hardware error detection mechanism and the operating system. This firmware layer handles error recovery operations (such as resetting individual processors or switching to backup processors) without requiring OS crashes, thereby maintaining system availability while preserving the reliability benefits of lockstep processing.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system implements self-service error recovery through automated firmware routines that detect lockstep failures and execute recovery procedures without human intervention or OS involvement. The firmware can automatically reset failed processors, switch to backup processors, or initiate other recovery actions, eliminating the need for complex OS customization while maintaining high availability.

Inventive Principle:
Principle #25Self-service

4Reliability

If processors are reset to recover from loss of lockstep, then error detection is maintained, but processor unavailability increases during the recovery period

Engineering Contradiction:
Improveerror detection capabilityVSAvoidprocessor unavailability time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary error detection by comparing outputs from two processors before the corrupted data can propagate through the system. The lockstep comparison mechanism detects discrepancies early in the execution pipeline, preventing corrupted results from being committed to memory or transmitted through buses.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements a hot spare processor mechanism where a backup processor is maintained in standby mode. When a primary processor fails lockstep verification, the system quickly switches to the hot spare processor, discarding the failed processor and recovering system operation with minimal interruption. This approach reduces the time loss compared to resetting the failed processor, as the spare processor is already initialized and ready to take over immediately.

Inventive Principle:
Principle #34Discarding and recovering

Data Source

PatentUS7502958B2System and method for providing firmware recoverable lockstep protection
Publication Date: 2009.03.10 FORAS TECH LTD
  • US7502958B2 patent drawing
  • US7502958B2 patent drawing
  • US7502958B2 patent drawing

AI summary

According to at least one embodiment, a method comprises detecting loss of lockstep for a pair of processors. The method further comprises triggering, by firmware, an operating system to idle the processors, and recovering, by the firmware, lockstep between the pair of processors. After lockstep is recovered between the pair of processors, the method further comprises triggering, by the firmware, the operating system to recognize the processors as being available for receiving instructions.