Divided Firmware Integrity via Memory Segment Protection

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Solution Overview

Problem

Conventional divided verification techniques for firmware are not applicable to low-end information devices due to the lack of high-performance hardware resources, such as Memory Management Units (MMUs), and cannot efficiently perform divided verification or change the verification sequence based on processing requirements.

Innovation Solution

The implementation of an information processing apparatus with a Memory Protection Unit (MPU) that allows for detection of unverified regions at arbitrary times, enabling appropriate divided verification and flexible verification sequences without relying on the number of segments, using the MPU's segment-based memory protection mechanism.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If conventional divided verification technique is used, then verification time is reduced, but it cannot be applied to low-end information devices without high-performance hardware resources

Engineering Contradiction:
Improveverification timeVSAvoidapplicability to low-end devices
Core Design Contradiction:
Loss of timeVSAdaptability or versatility

Solution Approach 1:

The firmware is divided into multiple segments stored in different memory regions, allowing selective verification of only the boot segment at activation time. This segmentation enables low-end devices to perform divided verification without requiring complex hardware resources, as each segment can be independently verified using simple memory access operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A verification management unit is introduced as an intermediary component that coordinates the verification process between the CPU and memory segments. This unit manages verification requests, tracks verification states of different segments, and controls access permissions, enabling divided verification functionality on low-end devices without requiring advanced hardware features.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If integrity check is performed for the entire program at activation, then security is ensured, but activation time increases

Engineering Contradiction:
ImprovesecurityVSAvoidactivation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The critical boot segment is verified in advance before execution, while other non-critical segments are verified later during runtime or deferred to subsequent activation cycles. This preliminary verification of only essential segments maintains security for boot operations while significantly reducing activation time compared to full program verification.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The verification scope and sequence are made dynamic rather than static. The verification management unit can adjust which segments to verify based on runtime conditions, priority levels, and resource availability. This dynamic approach allows the system to perform minimal verification at activation for fast boot-up, while ensuring comprehensive verification occurs over time.

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If divided verification is implemented, then verification flexibility is improved, but device complexity increases

Engineering Contradiction:
Improveverification flexibilityVSAvoidmechanism complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The verification management unit serves multiple functions: it manages verification requests, tracks verification states, controls memory access permissions, and coordinates with the integrity check unit. By consolidating these diverse verification management tasks into a single multi-functional unit, the system achieves high verification flexibility without proportionally increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10796003B2Divided integrity verification using memory segment protection
Publication Date: 2020.10.06 KIOXIA CORP
  • US10796003B2 patent drawing
  • US10796003B2 patent drawing
  • US10796003B2 patent drawing

AI summary

According to one embodiment, an information processing apparatus includes a first memory, a signal generation unit, an integrity check unit, and an access-right update unit. Firmware is stored in the first memory. The signal generation unit is configured to generate a signal when there is access violating access right, to the first memory. The integrity check unit is configured to perform, when the access violating access right is a verification request with respect to a predetermined verification target region, integrity check with respect to the verification target region in response to the signal. The access-right update unit is configured to update access right corresponding to the verification target region, to which the integrity check has been performed.