Firmware Slot Layout in NAND Memory Blocks for Faster Updates
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory systems face inefficiencies in using NAND flash memory blocks due to the need for excessive write processes when updating firmware, leading to suboptimal utilization of memory space and prolonged write times.
Innovation Solution
A memory system design where firmware is stored in multiple slots within a single block, allowing for efficient allocation and reducing the number of blocks required for firmware storage, and implementing a method to change active slots without altering the firmware content, thus minimizing the number of write operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If firmware is stored in separate blocks for each slot, then firmware can be updated independently, but the number of blocks required increases and write time increases
Solution Approach 1:
The patent combines multiple firmware slots into a single memory block, allowing multiple firmware versions to coexist in one block. This merging approach reduces the total number of blocks required and decreases write time while maintaining the ability to update firmware independently by selecting specific slots for updates.
Solution Approach 2:
The patent segments a single memory block into multiple slots, each capable of storing different firmware versions. This segmentation allows independent access and update of individual slots without affecting other slots, enabling firmware updates to be performed selectively without requiring separate blocks for each slot.
2Reliability
If multiple blocks are used for firmware storage, then firmware can be stored with redundancy, but block utilization efficiency decreases
Solution Approach 1:
The patent merges multiple firmware slots into a single memory block, improving block utilization efficiency by consolidating what would otherwise require separate blocks. This approach maintains firmware redundancy and reliability while reducing the total number of blocks needed, thereby improving overall productivity and resource utilization.
3Ease of operation
If active slot information is stored separately for each block, then slot management is simplified, but the number of write operations increases
Solution Approach 1:
The patent consolidates active slot information management into a single location within the memory block structure, reducing the number of write operations required. By storing and managing active slot information centrally rather than分散 across multiple blocks, the system decreases write operations while maintaining ease of slot management.
Data Source
AI summary
A memory system is connectable to a host. The memory system comprises a semiconductor memory and a memory controller electrically connected to the semiconductor memory. The memory controller, upon receiving a command from the host, the command instructing to update one or more of the plurality of firmwares stored in the first block, change at least one of a plurality of firmwares stored in any one of a plurality of slots of a first block, and change an active slot information stored in a first area of the first block.


