Multi-Processor Firmware Update Rollback Mechanism
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Solution Overview
Problem
Firmware updates in processing systems are vulnerable to errors and power failures, leading to potential device inoperability due to the need for entire memory rewrites in EEPROMs and the risk of transmission errors in wireless updates.
Innovation Solution
A processor system architecture where a primary processor receives and verifies updated instructions, reverts to original sets if updates fail, and communicates with secondary processors over an internal bus to ensure successful firmware updates across multiple processors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If wireless communication is used to update firmware, then ease of operation is improved, but transmission errors may occur resulting in unsuccessful updates
Solution Approach 1:
The system performs preliminary actions by receiving and storing both original and updated firmware images in memory before actually executing the update. The primary processor verifies the updated firmware image and stores it in a designated memory region, preparing the system for potential rollback if the update fails.
Solution Approach 2:
The patent implements beforehand cushioning by maintaining backup copies of original firmware images and establishing a rollback mechanism. If the updated firmware causes system failure or verification fails, the system can revert to the original firmware image, cushioning against the harmful effects of unsuccessful updates.
2Adaptability or versatility
If entire EEPROM is rewritten to update firmware, then update flexibility is improved, but vulnerability to power failures and errors increases
Solution Approach 1:
The firmware update process is segmented into distinct components: original firmware image storage, updated firmware image storage, and separate verification/storage regions. The memory is divided into specific regions (e.g., first region for original image, second region for updated image) allowing partial updates without rewriting the entire EEPROM.
Solution Approach 2:
The patent extracts the firmware image data from the entire EEPROM structure and isolates it into specific memory regions. The updated firmware image is stored in a designated second region separate from the original firmware in the first region, allowing selective updating without affecting other memory contents.
3Productivity
If firmware update proceeds without verification, then productivity is improved, but system reliability deteriorates due to potential errors
Solution Approach 1:
The primary processor performs verification of the updated firmware image by comparing it against expected parameters or checksums before committing the update. This feedback mechanism ensures the updated firmware is valid and compatible, preventing system failure while maintaining efficient update processing.
Data Source
AI summary
The present invention provides apparatuses, methods, and computer readable media for updating memory containing representations of computer-executable instructions in a processing system. A primary processor receives original sets of computer-readable instructions and updated sets of computer-readable instructions for the processors in processor system from a host system. The sets of computer-readable instructions are stored in memory (e.g., flash memory), where each processor in the system may utilize different sets. The primary processor then initiates updating its firmware with the corresponding updated set. If the update is unsuccessful, the primary processor reverts to the original set and the update process is terminated. Otherwise, the firmware update proceeds to the secondary processor. If the firmware update succeeds, the next secondary processor is updated. Otherwise, all of the updated processors revert to the corresponding original set of computer-readable instructions and the updating process is terminated.