Fish Bone Gate Electrode for PRAM Cell Transistor Current
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Solution Overview
Problem
Semiconductor memory devices, particularly phase change random access memory (PRAM), face challenges in enhancing the current supply capability of cell transistors, which limits writing speed due to miniaturization, and existing solutions complicate control mechanisms.
Innovation Solution
The semiconductor memory device incorporates a gate electrode with intersecting portions to short-circuit multiple source and drain regions, allowing for the assignment of at least three cell transistors in parallel to a memory element, thereby increasing the effective gate width and current supply capability without complex control requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the cell transistor is miniaturized for enhancing recording capacity, then the storage capacity is improved, but the current supply capability of the cell transistor decreases
Solution Approach 1:
The patent merges multiple cell transistors (at least three) in parallel to share a single memory element, effectively combining their current supply capabilities while maintaining high storage capacity through miniaturization of individual transistors
Solution Approach 2:
The patent introduces a gate electrode structure with intersecting portions that extend in multiple directions (first direction and second direction), creating a multi-dimensional configuration that short-circuits multiple source and drain regions to enhance current supply capability
2Power
If two cell transistors connected in parallel are assigned to one non-volatile memory element to enhance current supply capability, then the current supply capability is improved, but the device complexity increases
Solution Approach 1:
The gate electrode structure serves multiple functions simultaneously: it controls multiple cell transistors in parallel, short-circuits multiple source and drain regions, and maintains simplified control logic through its intersecting configuration that can be addressed by standard word lines
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the current supply capability of the cell transistor, enabling faster writing speeds in PRAM and other semiconductor memory devices by ensuring sufficient current for phase changes, while maintaining simplified control mechanisms.
Implementation Method 1
a gate electrode for short-circuiting the source regions and the drain regions by application of a predetermined voltage
Implementation Method 2
the storage of data is based on the phase state of phase change material contained in the recording layer. Specifically, there is a big difference between the electrical resistivity of the material in the crystalline state and the electrical resistivity in the amorphous state
Implementation Method 3
This phase change is effected by the phase change material being heated when a write current is applied
Data Source
AI summary
A semiconductor memory device includes a plurality of active regions, and a gate electrode in a fish bone shape arranged on each active region. In each active region, a plurality of source regions and a plurality of drain regions are arranged in a matrix manner. The source regions are commonly connected to a source line, and the drain regions are each connected to a lower electrode of a different memory element. According to the present invention, it is possible to assign three cell transistors connected in parallel to one memory element, so that an effective gate width is further increased.