Fishbone H-Clock Tree Construction for Lower Latency and Skew

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing H-clock trees are incompatible with high-speed interface modules, and suffer from large clock latency and skew, which complicates timing recovery.

Innovation Solution

A fishbone H-clock tree is constructed by introducing intermediate nodes, eliminating redundant nodes, uniformly mounting sinks on TAP nodes, and optimizing metal routing with a shield mechanism, using an EDA tool to adapt to high-speed interface modules.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a traditional H-clock tree is designed using an EDA tool, then the structure is simple and easy to implement, but the clock latency and skew are large

Engineering Contradiction:
Improveease of implementationVSAvoidclock latency
Core Design Contradiction:
Ease of manufactureVSLoss of time

Solution Approach 1:

The clock tree is segmented into a main trunk and multiple branches extending from TAP nodes. Intermediate nodes are introduced to divide the clock distribution path into smaller segments, allowing each segment to be optimized independently for reduced latency while maintaining the overall H-clock tree structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Intermediate nodes are introduced as intermediary elements between the root node and TAP nodes. These intermediate nodes act as mediators that buffer and redistribute clock signals, reducing the propagation distance and latency while maintaining signal integrity across the clock network.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If a traditional H-clock tree is designed using an EDA tool, then the structure is simple and easy to implement, but the clock skew is large

Engineering Contradiction:
Improveease of implementationVSAvoidclock skew
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

Different regions of the clock tree are assigned different qualities and optimizations. The main trunk uses robust routing for stability, while branches are optimized locally for minimal skew. Each TAP node region is independently optimized to ensure uniform clock arrival times across different parts of the chip.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The clock tree is designed to achieve equipotentiality in terms of clock arrival times at different TAP nodes. By carefully balancing the path lengths and introducing intermediate nodes, all TAP nodes are brought to approximately the same clock potential, minimizing skew across the entire clock network.

Inventive Principle:
Principle #12Equipotentiality

3Manufacturing precision

If an H-clock tree is designed for a module with array-distributed macrocells, then the distances to TAP nodes are equal, but the design is incompatible with high-speed interface modules

Engineering Contradiction:
Improveequal distance to TAP nodesVSAvoidcompatibility with high-speed interface module
Core Design Contradiction:
Manufacturing precisionVSAdaptability or versatility

Solution Approach 1:

The clock tree design transitions from a static, uniform H-clock structure to a dynamic, adaptable fishbone H-clock tree. The structure can be configured with varying branch lengths and intermediate node placements to accommodate different module types, including high-speed interface modules, while maintaining equal-distance properties where applicable.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The fishbone H-clock tree structure is designed to be universal and multi-functional, capable of serving both array-distributed macrocell modules and high-speed interface modules. The flexible configuration of intermediate nodes and branches allows the same basic structure to be adapted to different module architectures and speed requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250315580A1Method for Constructing Fishbone H-Clock Tree Suitable for High-Speed Interface Module
Publication Date: 2025.10.09 JIANGSU HUACHUANG MICROSYSTEM CO LTD
  • US20250315580A1 patent drawing
  • US20250315580A1 patent drawing
  • US20250315580A1 patent drawing

AI summary

A method for constructing a fishbone H-clock tree suitable for a high-speed interface module includes the following steps: S1, setting an instance of a clock tree by means of an EDA tool, and eliminating existing definitions; S2, setting a root node, a non-default routing rule and multiple TAP nodes; S3, creating an H-clock tree, and performing H-clock tree synthesis, wherein the H-clock tree synthesis includes: introducing multiple intermediate nodes between the root node and the TAP nodes, editing a clock network between the root node and the TAP nodes by means of an innovus script, and deleting each redundant intermediate node to obtain a structure of a fishbone H-clock tree; mounting multiple sinks on each TAP node, and defining the TAP nodes in a same source group by means of the EDA tool; and performing routing according to the non-default routing rule to complete construction.