Five-Level Inverter Multi-State Switching Cell
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Solution Overview
Problem
Existing three-phase inverters for photovoltaic power systems face challenges in achieving high efficiency, high power density, and low cost while minimizing weight, size, and harmonic distortion, with issues such as high EMI, leakage current, and complexity in semiconductor switching.
Innovation Solution
A five-level active neutral-point-clamping inverter topology utilizing multi-state switching cell technology with silicon carbide semiconductors, reducing conduction and switching losses, and employing a modulation strategy to minimize common mode leakage current and electromagnetic interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If high efficiency is achieved using silicon carbide semiconductors and magnetic components, then conversion efficiency improves, but power density decreases and cost increases
Solution Approach 1:
The patent segments the DC voltage into multiple levels (five-level inverter) using series-connected capacitors and switches. This segmentation allows for lower voltage stress on individual semiconductor devices, enabling the use of more efficient silicon carbide components while reducing overall system losses and improving power density through optimized component selection.
Solution Approach 2:
The patent employs composite material strategies by integrating silicon carbide semiconductors with optimized magnetic components and capacitor technologies. This composite approach achieves high conversion efficiency while managing thermal characteristics and electrical performance to maintain high power density without excessive cost increase.
2Loss of energy
If multi-level inverter topology is used, then voltage stress on switches is reduced and switching losses decrease, but device complexity increases
Solution Approach 1:
The five-level inverter topology segments the voltage conversion process into multiple discrete switching stages. Each stage handles a portion of the voltage conversion, reducing the voltage stress and switching losses on individual devices. The modular structure manages complexity by organizing switches and capacitors into repeatable units.
Solution Approach 2:
The patent changes the voltage parameter distribution across multiple levels rather than using a single high-voltage switching stage. This parameter transformation reduces switching losses by operating at lower voltage levels during each switching event, while the systematic arrangement of components keeps complexity manageable.
3Stress or pressure
If three-level NPC or T-type inverters are used, then voltage stress is reduced compared to two-level inverters, but EMI levels remain high requiring additional filtering
Solution Approach 1:
The five-level topology further segments the voltage transitions compared to three-level inverters, creating more gradual voltage steps. This segmentation reduces the rate of change of voltage (dv/dt), thereby lowering electromagnetic interference levels while maintaining reduced voltage stress on semiconductor devices.
Solution Approach 2:
The patent converts the inherent switching transitions that cause EMI into beneficial multi-level voltage steps. By carefully controlling the switching sequence in the five-level topology, the voltage transitions are distributed over time, reducing peak EMI emissions while the neutral-point clamping mechanism manages leakage current and improves overall system performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves high efficiency, high power density, and low cost with reduced size, weight, and volume, while minimizing total harmonic distortion and electromagnetic interference, enabling efficient DC-to-AC conversion for high-power applications.
Implementation Method 1
The concept of the three-state switching cell is described in reference 4, and an application of this three-state switching cell with the object to increase the current capability of the three-level inverters is described in reference 5
Implementation Method 2
A five-level active neutral-point-clamping inverter topology utilizing multi-state switching cell technology with silicon carbide semiconductors, reducing conduction and switching losses
Implementation Method 3
employing a modulation strategy to minimize common mode leakage current and electromagnetic interference
Data Source
Figure 1
Figure 2a~2b
Figure 3
AI summary
The present invention relates to a five-level active neutral-point- clamping inverter for converting a bipolar DC-voltage (V DC + and V DC -) to a three-phase AC output voltage, the converter comprising first, second and third input terminals (P, MP, N) and first, second and third output terminals (22, 23, 24), where the inverter further comprises a first, second, third multi-state switching cells (MSSC) (12, 12', 12") comprising three input terminals respectively connected to the input terminals of the inverter and respectively a first, second, third output terminal (9, 10, 11). The output terminals (9, 10, 11) of the first, second, third multi-state switching cell is connected via an inductor (La, Lb, Lc ) to said first, second, third output terminal (22, 23, 24) of the inverter and reach respective output terminal (22, 23, 24) of the inverter is connected to said second input terminal (MP) of the inverter via a respective capacitor (Ca, Cb, Cc).