FIVR Substrate Integration for CPU Die Yield and Thermal Management
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Solution Overview
Problem
Legacy implementations of fully integrated voltage regulators (FIVRs) within central processing units (CPUs) increase die size, leading to lower fabrication yields and higher production costs, as well as increased heat generation and interference with logic blocks due to field effect transistors and related circuitry.
Innovation Solution
Moving FIVR components, such as inductors and switching components, to the package substrate instead of the die, utilizing technologies like carbon nanotube transistors, organic field effect transistors, or oxide thin-film transistors, and integrating them with air core or magnetic inductors, which reduces the substrate area needed for FIVR and simplifies power routing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If FIVR components are integrated within the CPU die, then voltage regulation is achieved, but die size increases leading to lower fabrication yields and higher production costs
Solution Approach 1:
The patent segments the FIVR components from the CPU die and places them on the package substrate. This separation allows the CPU die to maintain its original smaller size for high fabrication yields, while the voltage regulation functionality is preserved on the substrate through distributed FIVR components including transistors, inductors, and capacitors.
Solution Approach 2:
The package substrate acts as an intermediary platform that hosts the FIVR components and provides voltage regulation functionality without requiring integration within the CPU die itself. This intermediary approach enables voltage control close to the logic blocks while keeping the die size minimal.
2Reliability
If FIVR components are integrated within the CPU die, then voltage regulation is achieved, but heat generation increases and interference with logic blocks occurs
Solution Approach 1:
By segmenting FIVR components from the logic blocks on the CPU die and placing them on the package substrate, the patent physically separates the heat-generating voltage regulation functions from the sensitive logic circuits. This reduces thermal interference and electrical interference while maintaining effective voltage control.
Solution Approach 2:
The patent implements distributed FIVR components on the package substrate that can provide localized voltage regulation close to where needed, rather than having all regulation functions centralized within the die. This local quality approach maintains voltage control effectiveness while separating heat generation from logic blocks.
Data Source
AI summary
Embodiments herein relate to integrating FIVR switching circuitry into a substrate that has a first side and a second side opposite the first side, where the first side of the substrate to electrically couple with a die and to provide voltage to the die and the second side of the substrate is to couple with an input voltage source. In embodiments, the FIVR switching circuitry may be printed onto the substrate using OFET, CNT, or other transistor technology, or may be included in a separate die that is incorporated within the substrate.


