Fixed Discharge Bit Line Sensing for Multi-Bit Memory Cells

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Solution Overview

Problem

Traditional solid-state memory devices face inefficiencies in storing multiple bits per cell due to the need for multiple program and read operations, which become increasingly troublesome as more bits are stored, leading to longer operation times and higher power consumption.

Innovation Solution

The memory devices utilize a fixed discharge sensing scheme that generates a voltage signal representative of the actual threshold voltage of each memory cell across a continuum of possible threshold voltages, allowing for a single read operation to return a complete data value or bit pattern, rather than discrete bits, thereby reducing operation time and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple program and read operations are used to store multiple bits per cell, then data storage capacity is improved, but operation time and power consumption increase

Engineering Contradiction:
Improvedata storage capacityVSAvoidoperation time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent combines multiple read operations into a single operation by using a differential sensing approach that reads multiple bits simultaneously. The sense amplifier compares threshold voltages of multiple memory cells in parallel, allowing multiple bits to be retrieved in one operation rather than requiring separate read operations for each bit.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The sensing circuit is designed to perform multiple functions: it can read multiple bits from different memory cells simultaneously, determine their logical states through differential comparison, and output complete data values in a single operation. This multi-functional approach eliminates the need for multiple sequential read operations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Quantity of substance

If multiple program and read operations are used to store multiple bits per cell, then data storage capacity is improved, but power consumption increases

Engineering Contradiction:
Improvedata storage capacityVSAvoidpower consumption
Core Design Contradiction:
Quantity of substanceVSUse of energy by moving object

Solution Approach 1:

The patent merges multiple power-intensive read operations into a single operation. By using differential sensing that simultaneously evaluates multiple memory cells, the circuit reduces the total number of operation cycles and associated power consumption while maintaining the ability to retrieve multiple bits of data.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The differential sensing circuit automatically determines the logical states of multiple bits through direct voltage comparison, eliminating the need for multiple sequential operations. The circuit self-organizes to read multiple cells in parallel and directly outputs the complete data value, reducing overall power consumption.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If discrete bit reading is used, then data accuracy is maintained, but operation complexity increases

Engineering Contradiction:
Improvedata accuracyVSAvoidoperation complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent combines multiple discrete bit readings into a single differential measurement operation. The sense amplifier simultaneously compares threshold voltages of multiple memory cells and directly outputs complete data values, reducing operational complexity while preserving data accuracy through the differential comparison method.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables efficient storage and retrieval of multiple bits per cell with a single operation, significantly reducing operation times and power consumption while maintaining high reliability and data integrity.

Implementation Method 1

the bit line is allowed to discharge through a memory cell string including the target cell

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

removing fixed units of charge from the bit lines of a memory array during a read operation

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS7894271B2Sensing of memory cells in a solid state memory device by fixed discharge of a bit line
Publication Date: 2011.02.22 MICRON TECHNOLOGY INC
  • US7894271B2 patent drawing
  • US7894271B2 patent drawing
  • US7894271B2 patent drawing

AI summary

In one or more of the disclosed embodiments, a memory device is provided that reads a target memory cell by first charging the series string of memory cells to which the target memory cell is coupled. A fixed unit of charge is removed from the charged bit line. The bit line is sensed by sense amplifiers to determine the read voltage (i.e., threshold voltage) applied to a word line coupled to the target cell in order to turn on the target cell. The threshold voltage is indicative of the analog voltage stored on the target memory cell.