Fixed Point Integer Division for AC/DC Prediction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing video coding technologies face challenges in accurately performing floating point operations, particularly integer division, in fixed point devices like digital signal processors (DSPs) during AC/DC prediction, which is crucial for video coding standards like MPEG-4, as incorrect predictions can lead to error propagation and increased processing cycles.

Innovation Solution

The implementation of a lookup table (LUT) with entries as an inverse function of index B, allowing for accurate fixed point calculations of floating point operations (A // B) by separating selected entries into high and low portions, using equations such as (((B1*A)<<1)+((B2*A)>>15)+32768)>>16, to ensure rounding to the nearest integer, reducing processing cycles and maintaining accuracy across all input parameters.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If floating point operations are performed in fixed point devices during AC/DC prediction, then video coding can be implemented in DSPs, but calculation accuracy deteriorates due to fixed point limitations

Engineering Contradiction:
Improvevideo coding implementation in DSPsVSAvoidcalculation accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent transforms the floating point division operation into an equivalent fixed point operation by changing the mathematical parameters. Specifically, it uses the relationship between floating point and fixed point representations to convert the division operation A/B into a form that can be accurately computed using fixed point arithmetic, thereby maintaining both adaptability to DSPs and calculation accuracy.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If complex floating point division is performed, then accurate AC/DC prediction is achieved, but processing cycles increase

Engineering Contradiction:
ImproveAC/DC prediction accuracyVSAvoidprocessing cycles
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent substitutes the complex floating point division mechanism with a simpler fixed point arithmetic mechanism. By replacing the floating point division operation with equivalent fixed point operations (multiplication and bit shifting), it achieves the same prediction accuracy while significantly reducing the processing cycles required, as fixed point operations are computationally less intensive than floating point operations in DSPs.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Productivity

If standard fixed point division is used, then processing is simplified, but prediction accuracy deteriorates due to rounding errors

Engineering Contradiction:
Improveprocessing simplicityVSAvoidprediction accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent applies parameter changes by transforming the division operation into a mathematically equivalent form that is compatible with fixed point arithmetic. It uses the relationship between floating point and fixed point representations to convert the division operation into a form that can be accurately computed using fixed point arithmetic, thereby maintaining both processing simplicity and prediction accuracy.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7895250B2Fixed point integer division techniques for AC/DC prediction in video coding devices
Publication Date: 2011.02.22 QUALCOMM INC
  • US7895250B2 patent drawing
  • US7895250B2 patent drawing
  • US7895250B2 patent drawing

AI summary

The disclosure describes a method for performing a fixed point calculation of a floating point operation (A // B) in a coding device, wherein A // B represents integer division of A divided by B rounded to a nearest integer. The method may comprise selecting an entry from a lookup table (LUT) having entries generated as an inverse function of an index B, wherein B defines a range of values that includes every DC scalar value and every quantization parameter associated with a coding standard, and calculating A // B for coding according to the coding standard based on values A, B1 and B2, wherein B1 and B2 comprise high and low portions of the selected entry of the LUT. The techniques may simplify digital signal processor (DSP) implementations of video coders, and are specifically useful for MPEG-4 coders and possibly others.