Fixed-Point DPRT Architecture Using Circular Shift Registers

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Solution Overview

Problem

Existing image processing technologies face challenges in efficiently computing the Discrete Periodic Radon Transform (DPRT) due to high hardware resource requirements and limitations in scalability, particularly in embedded systems where energy consumption and computational resources are constrained.

Innovation Solution

A fast and scalable approach for computing the forward and inverse DPRT using parallel shift and add operations, implemented with fixed-point adder trees, circular shift registers, and an image block-based method that adapts to available resources, allowing for efficient computation regardless of image size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the Discrete Radon Transform is computed using the Fast Fourier Transform (FFT), then the transformation can be performed, but it requires expensive floating point units and significantly larger hardware resources

Engineering Contradiction:
Improvetransformation accuracyVSAvoidhardware resources
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent replaces expensive floating-point units with fixed-point arithmetic units that are cheaper and more resource-efficient. The fixed-point implementation achieves sufficient precision for medical imaging applications while dramatically reducing hardware resource requirements, making the system suitable for real-time operation in embedded devices.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent changes the numerical representation parameter from floating-point to fixed-point arithmetic. This parameter change maintains the essential transformation accuracy needed for Radon transform while reducing the computational complexity and hardware resource requirements, enabling implementation in resource-constrained embedded systems.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If the Discrete Periodic Radon Transform is implemented, then fixed-point arithmetic can be used, but it requires computing a large number of additions and memory accesses

Engineering Contradiction:
Improvearithmetic simplicityVSAvoidcomputation speed
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent segments the computation of the Discrete Periodic Radon Transform into distinct stages: data loading, transformation computation, and result storage. By organizing the computation into parallel segments that can be executed simultaneously, the system reduces the total computation time despite the large number of additions required, thereby improving productivity while maintaining fixed-point arithmetic simplicity.

Inventive Principle:
Principle #1Segmentation

3Use of energy by moving object

If scalable solutions are designed to allocate hardware resources based on constraints, then energy consumption can be minimized, but the system complexity increases

Engineering Contradiction:
Improveenergy consumptionVSAvoidsystem architecture
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent implements a dynamic scalable architecture where hardware resources are allocated based on real-time constraints such as image size and processing requirements. The system can dynamically adjust the number of parallel computation units, memory allocation, and processing depth to match the specific task demands, thereby minimizing energy consumption while avoiding the need for a permanently complex system architecture.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10049469B2System and methods for computing forward and inverse discrete periodic radon transform
Publication Date: 2018.08.14 STC UNM
  • US10049469B2 patent drawing
  • US10049469B2 patent drawing
  • US10049469B2 patent drawing

AI summary

A fast and a scalable approach for computing the forward and inverse DPRT that uses: (i) a parallel array of fixed-point adder trees to compute the additions, (ii) circular shift registers to remove the need for accessing external memory components, (iii) an image block-based approach to DPRT computation that can fit the proposed architecture to available resources, and (iv) fast transpositions that are computed in one or a few clock cycles that do not depend on the size of the input image.