Fixed-Point Normalization via Floating-Point DSP Blocks

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Solution Overview

Problem

Conventional integrated circuits that perform floating-point arithmetic operations face challenges in normalization due to the expense of circuit area and operational latency, particularly with the use of leading-zero counters and barrel shifters, which are difficult to pipeline and route efficiently.

Innovation Solution

The implementation of a normalization circuit using embedded DSP blocks within programmable integrated circuits, which leverages floating-point capabilities to efficiently generate normalized floating-point numbers and count values by inserting a leading one and padding zeros, allowing for compact and high-performance normalization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If leading-zero counters and barrel shifters are used for normalization, then normalization functionality is achieved, but circuit area and operational latency increase

Engineering Contradiction:

Improvenormalization functionalityVSAvoidcircuit area

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent replaces traditional mechanical normalization components (leading-zero counters and barrel shifters) with a floating-point-based computational approach. By converting the fixed-point number to floating-point format and using floating-point arithmetic operations, the system achieves normalization without requiring dedicated normalization hardware, thereby reducing circuit area while maintaining functionality.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the representation parameter of the number from fixed-point to floating-point format. This parameter change enables the use of floating-point functional blocks for normalization, which are more area-efficient and can be better integrated into the existing floating-point arithmetic units of the processor, reducing both area and latency.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If leading-zero counters and barrel shifters are used for normalization, then normalization functionality is achieved, but operational latency increases

Engineering Contradiction:

Improvenormalization functionalityVSAvoidoperational latency

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent replaces sequential mechanical normalization operations with parallel floating-point arithmetic operations. The conversion to floating-point format and subsequent arithmetic operations can be executed in parallel within the floating-point functional blocks, significantly reducing operational latency compared to sequential barrel shifter operations.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent performs preliminary conversion of the fixed-point number to floating-point format before normalization. This preliminary action prepares the data in a format that can be efficiently processed by existing floating-point hardware, enabling faster normalization without requiring additional latency for format conversion during the normalization process itself.

Inventive Principle:

Principle #10Preliminary action

3Reliability

If barrel shifters are implemented using multiplexer networks, then normalization is achieved, but pipelining capability is limited

Engineering Contradiction:

Improvenormalization functionalityVSAvoidpipelining complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces the complex multiplexer network structure with a streamlined floating-point arithmetic approach. By using floating-point conversion and arithmetic operations, the system achieves normalization through simpler control logic that is more amenable to pipelining, reducing device complexity and enabling better integration with pipeline architectures.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent uses floating-point functional blocks that serve multiple purposes: they handle both the conversion from fixed-point to floating-point format and the subsequent normalization operations. This multi-functionality eliminates the need for separate dedicated normalization hardware, simplifying the overall device structure and improving pipelining capabilities.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS10671345B2Methods and apparatus for performing fixed-point normalization using floating-point functional blocks

Publication Date: 2020.06.02 ALTERA CORP

AI summary

An integrated circuit may include normalization circuitry that can be used when converting a fixed-point number to a floating-point number. The normalization circuitry may include at least a floating-point generation circuit that receives the fixed-point number and that creates a corresponding floating-point number. The normalization circuitry may then leverage an embedded digital signal processing (DSP) block on the integrated circuit to perform an arithmetic operation by removing the leading one from the created floating-point number. The resulting number may have a fractional component and an exponent value, which can then be used to derive the final normalized value.