Fixture De-embedding Using Calibration Structures
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Solution Overview
Problem
Existing methods for de-embedding test fixtures in Vector Network Analyzer measurements are prone to errors due to time-gating, especially when reconstructing the S parameters of a '2× thru' structure from '1× open' and '1× short' structures.
Innovation Solution
The method combines S parameters of '1× open' and '1× short' structures, with or without correction factors, to reconstruct the S parameters of '2× thru' without the need for time-gating, using a calibration board with both '1× open' and '1× short' structures, and introduces correction factors based on differences from perfect magnetic and electric conductor boundary conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If time-gating is used to reconstruct S parameters of '2× thru' from '1× open' and '1× short' structures, then de-embedding can be performed, but measurement precision deteriorates due to errors in waveform estimation and frequency-to-time conversion
Solution Approach 1:
The patent replaces the time-domain processing mechanism (time-gating with waveform estimation and frequency-to-time conversion) with a direct frequency-domain mathematical approach. By using algebraic operations on S parameters in the frequency domain, the method eliminates the need for time-gating and its associated errors in waveform estimation and conversion, thereby maintaining de-embedding capability while significantly improving measurement precision
Solution Approach 2:
The patent changes the domain of operation from time-domain to frequency-domain processing. Instead of converting S parameters to time-domain, applying time-gating, and converting back, the method performs all de-embedding operations directly in the frequency domain using mathematical relationships between S parameters of '1× open', '1× short', and '2× thru' structures, thus avoiding conversion errors and improving accuracy
2Ease of manufacture
If '1× open' and '1× short' structures are used for calibration, then the calibration board design is simplified, but the reconstruction of '2× thru' S parameters becomes error-prone without time-gating
Solution Approach 1:
The patent replaces the time-gating processing system with a frequency-domain mathematical system that directly computes '2× thru' S parameters from '1× open' and '1× short' measurements. This substitution maintains the simplicity of the calibration board design while eliminating the reliability issues associated with time-gating and waveform estimation errors
Data Source
AI summary
The present disclosure involves method and apparatus for de-embedding test fixture to extract the electrical behavior of device under test. A calibration board with both “1× open” and “1× short” test structures is fabricated and measured by equipment such as vector network analyzer that produces S parameters. The S parameters of “1× open” and “1× short”, with or without correction factors, are combined to produce the S parameters of equivalent “2× thru” test structure. The S parameters of equivalent “2× thru” are used subsequently to de-embed the test fixture. This present disclosure gives a simpler and more accurate method to create the S parameters of “2× thru” for de-embedding.


