Adaptive Memory Programming via Flag Cell History Reading
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Solution Overview
Problem
Memory devices, such as NAND flash memory, face challenges in maintaining optimal programming conditions due to physical changes over time, leading to variability in response to bias signals, which affects write performance and reliability.
Innovation Solution
Incorporating flag cells to store use-history information within a memory array, allowing for dynamic modification of program-verify process parameters based on the aging and usage of the memory device, such as voltage amplitude and pulse width, during the program-verify process, enabling concurrent reading of data and flag cells on the same wordline without additional processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If memory cells are programmed using fixed bias signals, then the programming process is simple, but the programming reliability deteriorates over time due to physical changes in memory cells
Solution Approach 1:
The patent implements dynamic programming by reading flag cells that store history information about the memory array's aging state, and using this information to adaptively adjust programming bias signals in real-time. This transforms the fixed programming approach into a dynamic one that responds to physical changes in memory cells over time.
Solution Approach 2:
The patent establishes a feedback mechanism where flag cells store history information about programming operations and aging effects, and this stored information is read back during subsequent programming operations to adjust the bias signals. This closed-loop feedback system enables the programming process to compensate for physical changes and maintain reliability.
2Measurement precision
If separate read processes are used to obtain memory cell history, then the history information can be accurately obtained, but the programming speed decreases due to additional process steps
Solution Approach 1:
The patent merges the history reading function with the data cell reading function by allowing flag cells and data cells to share common wordlines. This enables the history information to be read concurrently with data cells during the same programming operation, eliminating the need for separate read processes and maintaining programming speed.
Solution Approach 2:
The flag cells are integrated into the existing memory array structure and share wordlines with data cells, allowing them to serve dual purposes: storing history information and being read during normal programming operations. This multi-functionality eliminates the need for dedicated separate read processes.
3Adaptability or versatility
If flag cells are added to store use-history information, then adaptive programming capability is improved, but the device complexity increases
Solution Approach 1:
The flag cells use the same physical structure and operation mechanisms as data cells, including sharing wordlines and using identical readout procedures. This universality allows the memory array to handle both data storage and history tracking with the same infrastructure, minimizing the increase in device complexity.
Solution Approach 2:
The patent implements local quality by providing adaptive programming control at the wordline level, where history information from flag cells enables customized programming parameters for specific regions of the memory array. This localized adaptation maintains overall system simplicity while enabling sophisticated control where needed.
Data Source
AI summary
Subject matter disclosed herein relates to a memory device, and more particularly to write performance of a memory device.