Flanged Column Interconnects for Stress-Resistant Package Mounting

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing semiconductor devices face issues with stress generation and soldering defects due to inclined or bent connection terminals, leading to peeling, cracking, and reduced mechanical strength, especially under thermal fluctuations.

Innovation Solution

A semiconductor device with a column having a flange portion at the upper end, joined to a land via a first solder portion with a matching melting point, and a second solder portion connecting to a wiring board, along with specific dimensional relationships to alleviate stress.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If connection terminals are miniaturized to increase density, then mounting density is improved, but mechanical strength deteriorates

Engineering Contradiction:
Improvemounting densityVSAvoidmechanical strength
Core Design Contradiction:
ProductivityVSStrength

Solution Approach 1:

The connection terminal is constructed as a composite structure with a wire core providing mechanical strength and a solder coating layer providing solderability. This composite design allows the terminal to maintain adequate mechanical strength even when miniaturized, while still enabling reliable soldering connections to the wiring board.

Inventive Principle:
Principle #40Composite materials

2Productivity

If connection terminals are arranged with high density, then terminal count is improved, but soldering reliability deteriorates

Engineering Contradiction:
Improveterminal densityVSAvoidsoldering reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The invention changes the surface parameter of the connection terminal by applying a solder coating layer with specific material composition and thickness. This coating layer optimization ensures reliable soldering even when terminals are densely arranged, preventing soldering defects while maintaining high terminal density.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If reflow furnace soldering is used to achieve high density mounting, then mounting precision is improved, but repairability deteriorates

Engineering Contradiction:
Improvesoldering precisionVSAvoidrepairability
Core Design Contradiction:
Manufacturing precisionVSEase of repair

Solution Approach 1:

The invention selects solder coating material with a melting point lower than the reflow furnace temperature. This parameter optimization allows the solder to melt and flow properly during reflow soldering for precise mounting, while also enabling easy removal and repair by reheating to the solder's melting point without damaging other components.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design relaxes stress on connection terminals, reducing the likelihood of peeling and cracking, and enhances soldering strength and durability under thermal fluctuations.

Implementation Method 1

a first solder portion joining the land and the flange portion of the column, in which the first solder portion has a melting point equivalent to a melting point of a second solder portion joining a lower end of the column to a land of a wiring board

Methodology Applied
Scientific EffectSoldering: Soldering

Data Source

PatentUS20250385207A1Semiconductor device, mounting substrate, and electronic device
Publication Date: 2025.12.18 SONY SEMICON SOLUTIONS CORP
  • US20250385207A1 patent drawing
  • US20250385207A1 patent drawing
  • US20250385207A1 patent drawing

AI summary

Provided are a semiconductor device in which stress applied to a column connecting a semiconductor package and a wiring board is relaxed, a mounting substrate having the semiconductor device, and an electronic device having the semiconductor device and the mounting substrate. A semiconductor device according to the present disclosure includes a semiconductor package having a plurality of lands on a lower surface, a column having a flange portion at least at an upper end and joined to one of the lands, and a first solder portion joining the land and the flange portion of the column, in which the first solder portion has a melting point equivalent to a melting point of a second solder portion joining a lower end of the column to a land of a wiring board, and the column is joined to the land of the semiconductor package via the first solder portion. Furthermore, the mounting substrate according to the present disclosure is configured so that the lower end of the column of the semiconductor device is joined to the wiring board by the second solder portion. Furthermore, an electronic device including the semiconductor device or the mounting substrate is configured.