Differential Flash ADC Ladder for Propagation Delay Distortion
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Solution Overview
Problem
Flash analog to digital converters experience delays and distortion due to propagation delays in resistor ladders, particularly at the ends of the ladder, which affect the accuracy of high-speed signal conversion.
Innovation Solution
The implementation of a differential resistance ladder with nested transimpedance amplifiers and a control module that adjusts digital values based on comparator outputs, along with delay elements and latching devices to create identical aggregate delays and minimize distortion, is used. This includes a method where the resistances are connected in series and parallel configurations to optimize signal propagation and calibration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a resistor ladder is used in flash ADC, then the converter can achieve high-speed signal conversion, but propagation delays in the resistor ladder cause distortion and reduce accuracy
Solution Approach 1:
Buffer amplifiers are introduced as intermediary elements between the resistor ladder and the comparators. These buffers act as mediators that drive the comparators directly, isolating the resistor ladder from the capacitive loading of the comparators and minimizing propagation delays while maintaining high-speed operation
Solution Approach 2:
The patent changes the electrical parameters of the resistor ladder by using equal-value resistors instead of traditional binary-weighted resistors. This uniform resistance configuration, combined with buffered outputs, equalizes the propagation delays across all comparator inputs, reducing distortion and improving conversion accuracy
2Measurement precision
If the resistor ladder is made longer to increase resolution, then more signal levels can be detected, but propagation delay increases causing more distortion
Solution Approach 1:
The resistor ladder is segmented into multiple equal-value resistor sections, each section driven by its own buffer amplifier. This segmentation allows the ladder to achieve high resolution through multiple taps while each segment maintains short propagation delay due to the buffering, preventing delay accumulation across the full length of the ladder
Solution Approach 2:
By changing from binary-weighted resistors to equal-value resistors with buffered outputs, the patent transforms the time characteristics of the ladder. Each segment presents a uniform, minimized resistance to the comparators, ensuring that even as the ladder length increases for higher resolution, the propagation delay remains bounded and does not increase linearly with the number of segments
3Loss of time
If buffer amplifiers are added to drive comparators, then propagation delay is reduced, but device complexity increases
Solution Approach 1:
The buffer amplifiers serve multiple functions simultaneously: they drive the comparators to minimize propagation delay, provide impedance matching between the resistor ladder and comparators, reduce the capacitive loading effect on the resistor nodes, and enable the use of equal-value resistors for all ladder segments. This multi-functionality justifies the added complexity by delivering comprehensive performance improvements
Data Source
Figure 1~2
Figure 3
Figure 4A~4B
AI summary
A differential analog to digital converter (ADC) comprises first and second resistance ladder legs, first and second amplifiers, and a plurality of comparators. Each resistance ladder leg includes two resistances having first ends that communicate with a middle node and second ends that communicate with a current source. The first amplifier applies a voltage based upon a first phase of an input signal to the middle node of the first resistance ladder leg. The second amplifier applies a voltage based upon a second phase of the input signal to the middle node of the second resistance ladder leg. The plurality of comparators each has first and second inputs, wherein the first input communicates with one of the two resistances of the first resistance ladder leg, and the second input communicates with one of the two resistances of the second resistance ladder leg.