Flash ADC Amplifier Array With Reversed References for Offset Error
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Solution Overview
Problem
Conventional flash analog to digital converters (ADCs) face signal distortion due to offset voltages caused by device mismatch in preamplifiers and comparators, leading to integral nonlinearity curvature and systematic errors, especially at the boundaries of the preamplifier array, which is exacerbated by the need for additional reference voltages that reduce the least significant bit voltage, making it difficult to implement in low supply voltage systems.
Innovation Solution
The implementation of a flash ADC with reversed reference voltage dummy amplifiers on both sides of the main amplifier array, coupled with an averaging network that uses a cross-connecting structure to preserve impulse response symmetry and reduce parasitic capacitance, allowing for the cancellation of saturation currents and correction of systematic errors without decreasing the LSB voltage, even in low supply voltage systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If enormous amounts of dummy amplifiers are added at both boundaries of the preamplifier array to solve boundary problems, then the environment uniformity is improved, but the device complexity and component quantity increase enormously
Solution Approach 1:
The patent creates a virtual copy of the boundary environment by using the existing boundary preamplifier connected to VSS as a reference model. The dummy preamplifiers are designed to replicate this boundary condition rather than creating entirely new components, thereby reducing the overall complexity while maintaining environmental uniformity.
Solution Approach 2:
The boundary preamplifier serves multiple functions: it acts as both a real functional amplifier and as the reference model for designing dummy amplifiers. This multi-functionality reduces the need for separate reference structures and minimizes the total number of components required.
2Stability of the object's composition
If additional reference voltages are provided for dummy amplifiers, then the boundary environment is improved, but the LSB voltage decreases making it difficult to implement in low supply voltage systems
Solution Approach 1:
The boundary preamplifier connected to VSS serves as a universal reference for both the dummy amplifiers and the main preamplifier array. This shared reference eliminates the need for separate additional reference voltages, thereby preserving the LSB voltage level and enabling implementation in low supply voltage systems.
Solution Approach 2:
The patent merges the reference voltage function into the existing VSS connection of the boundary preamplifier. By combining the reference function with the existing power structure rather than adding separate reference voltage lines, the LSB voltage is maintained and the system remains compatible with low supply voltage operations.
3Stability of the object's composition
If conventional dummy amplifiers are used at boundaries, then the preamplifier environment is improved, but the averaging network symmetry is broken causing systematic error
Solution Approach 1:
The patent intentionally uses asymmetric connection configurations for dummy amplifiers (connecting to VSS) that mirror the natural boundary conditions of the main array. This controlled asymmetry actually preserves the overall symmetry of the averaging network by correctly representing the boundary environment, thereby eliminating systematic errors rather than creating them.
Solution Approach 2:
The dummy amplifiers are designed with local quality that matches their specific boundary position - connecting to VSS just like the boundary preamplifiers of the main array. This localized matching ensures that each boundary element has the correct environmental characteristics, maintaining overall system symmetry and preventing systematic errors in the averaging process.
Data Source
AI summary
An amplifier array circuit is provided. An amplifier array includes a main amplifier array comprising a plurality of first amplifiers and a plurality of reference voltages, wherein the first amplifier is coupled to an input signal and the reference voltage corresponding to the first amplifier. A first reversed reference voltage amplifier array is located on one side of the main amplifier array and has a plurality of second amplifiers coupled to the input signal and the reference voltages, respectively. A second reversed reference voltage amplifier array is located on the other side of the main amplifier array and has a plurality of third amplifiers coupled to the input signal and the reference voltages respectively. The averaging network is coupled to a first output terminal and a second output terminal of the first, second and third amplifiers.