Flash Allocation Unit Sizing Across Heterogeneous Erase Blocks

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Existing storage systems face inefficiencies in managing heterogeneous erase block and data chunk sizes, leading to suboptimal performance and reduced reliability due to unnecessary write operations and inadequate wear leveling.

Innovation Solution

The solution involves optimizing allocation unit sizes by directly addressing data blocks within flash drives without address translation by storage controllers, enabling higher-level processes to manage operations such as data relocation and garbage collection, thereby reducing redundant writes and improving reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If storage controllers perform address translation for heterogeneous erase block sizes, then data management flexibility is improved, but write operations become redundant and reliability decreases

Engineering Contradiction:

Improvedata management flexibilityVSAvoidstorage system reliability

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The patent extracts the address translation function from the storage controller and relocates it to the host system. This removal eliminates the source of redundant write operations while maintaining data management flexibility through host-level management of allocation units and erase block mappings.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The host system performs self-service by directly managing address translation and data placement decisions. The host maintains allocation unit metadata and performs wear leveling independently, eliminating unnecessary controller-mediated write operations and improving system reliability.

Inventive Principle:

Principle #25Self-service

2Adaptability or versatility

If storage controllers manage heterogeneous erase block sizes, then device compatibility is improved, but unnecessary write operations increase

Engineering Contradiction:

Improvedevice compatibilityVSAvoidwrite operation overhead

Core Design Contradiction:

Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The patent introduces allocation units as an intermediary layer between the host and heterogeneous erase blocks. The host manages allocation units with uniform interfaces, while the allocation unit metadata structures handle the complexity of mapping to different erase block sizes, eliminating redundant writes through direct host control.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Ease of operation

If address translation is performed by storage controllers, then system abstraction is improved, but wear leveling effectiveness decreases

Engineering Contradiction:

Improvesystem abstractionVSAvoidwear leveling effectiveness

Core Design Contradiction:

Ease of operationVSReliability

Solution Approach 1:

The patent inverts the traditional control model by having the host (rather than the controller) perform address translation and manage wear leveling. The host uses allocation unit metadata to directly map logical addresses to physical erase blocks, enabling effective wear leveling across heterogeneous devices without controller intervention.

Inventive Principle:

Principle #13The other way round (Inversion)

Data Source

PatentUS12580024B2Optimizing allocation unit sizes for heterogeneous storage systems

Publication Date: 2026.03.17 PURE STORAGE INC

AI summary

Allocation units having equal allocation unit sizes are formed for writing into erase blocks of a storage system. One or more of the allocation units are formed of at least a portion of two erase blocks. Data is written to the erase blocks forming the allocation units such that one of the erase blocks is open at a time during the writing of the data.