Flash-Aware Heap Memory Management via Segmented Allocation
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Solution Overview
Problem
Conventional memory management techniques for flash-based byte addressable memory devices face challenges such as variable access latency, limited lifespan due to high cache flush rates, and significant metadata overhead, which affect performance and reliability in host devices.
Innovation Solution
A method for flash-aware heap memory management that reserves a contiguous virtual space, partitions it into chunks with logical segments, and allocates memory by identifying the least free logical segment to minimize metadata overhead and access latency, ensuring efficient use of flash-based memory without impacting throughput.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional allocators are used for flash-based byte addressable memory devices, then memory allocation can be performed, but access latency increases due to random physical page mapping and cache misses
Solution Approach 1:
The patent divides the flash memory into multiple segments, where each segment is a contiguous range of physical pages. The virtual address space is also divided into segments that map to these physical segments. This segmentation allows the system to manage large memory spaces efficiently while maintaining contiguity within each segment, thereby reducing random access patterns and improving cache performance.
Solution Approach 2:
The patent performs preliminary actions by pre-establishing segment mappings between virtual and physical address spaces. When memory is allocated, the system determines which segment the allocation falls into and uses the pre-configured mapping for that segment, avoiding the need for complex runtime page table lookups and reducing access latency.
2Adaptability or versatility
If demand paging is used in operating system, then virtual memory management is achieved, but cache thrashing increases in multithreaded environments due to consecutive physical pages mapped to different virtual addresses
Solution Approach 1:
The patent applies local quality by making different parts of the address space have different mapping characteristics. Within each segment, consecutive virtual pages are mapped to consecutive physical pages, ensuring spatial locality and reducing cache thrashing. This local contiguity is maintained while allowing different segments to be mapped to different physical regions, providing both adaptability and cache performance.
3Duration of action of stationary object
If conventional allocators allocate memory without considering flash characteristics, then allocation simplicity is maintained, but device lifespan decreases due to high cache flush rates and write amplification
Solution Approach 1:
The patent segments the flash memory into multiple physical segments and manages allocations at the segment level. By tracking which segments are frequently accessed and keeping their mappings stable, the system reduces cache flush rates. The segmentation also allows the system to identify and optimize hot segments, thereby extending device lifespan without significantly complicating the allocation process.
Solution Approach 2:
The patent incorporates feedback mechanisms by monitoring access patterns to different segments. Based on this feedback, the system can adjust segment mappings and allocation strategies to minimize write amplification and cache flushes. Frequently accessed segments are kept in cache longer, and their mappings are stabilized, reducing the overall stress on the flash memory and extending its lifespan.
Data Source
AI summary
A method for flash-aware heap memory management includes reserving a contiguous virtual space in a memory space of at least one process with a size equivalent to a size of a flash-based byte addressable device. The method also includes partitioning by a host device the memory space of the flash-based byte addressable device into multiple chunks. Each chunk includes multiple logical segments. The host device receives a memory allocation request from a thread associated with an application. The host device determines at least one chunk from the multiple chunks, including a least free logical segment compared to the other chunks from the multiple chunks. The host device allocates to the thread at least one chunk that includes the least free logical segment.