Flash-Backed DIMM Controller for Power Failure Data Integrity
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Solution Overview
Problem
Digital processing devices, such as RAID systems, face data loss when power is interrupted due to the volatility of memory caches, and existing solutions require additional non-volatile memory for storing parameters like Serial Presence Detect (SPD) information, leading to increased size and cost.
Innovation Solution
A flash-backed dual in-line memory module (DIMM) with non-volatile memory, volatile memory, and a controller that transfers data from volatile to non-volatile memory during power failures, using a backup power source, and manages memory states to optimize power usage, eliminating the need for a separate EEPROM for SPD storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a separate non-volatile memory is added to store SPD information, then data integrity is improved, but device complexity and size increase
Solution Approach 1:
The patent combines the SPD storage function with the existing non-volatile memory used for data backup, eliminating the need for a separate EEPROM device. The non-volatile memory serves dual purposes: storing backup data and storing SPD parameters, thereby reducing device complexity while maintaining data integrity.
Solution Approach 2:
The non-volatile memory is designed to perform multiple functions: it acts as both a data backup storage during power failures and an SPD information storage. This multi-functionality approach reduces the overall number of components needed in the memory module.
2Reliability
If a separate non-volatile memory is added for SPD storage, then data integrity is improved, but manufacturing cost increases
Solution Approach 1:
By merging the SPD storage function into the existing non-volatile memory, the patent eliminates the need to manufacture and assemble a separate EEPROM component, thereby reducing manufacturing costs while maintaining data integrity through the non-volatile storage capability.
3Reliability
If a backup power source is provided, then data integrity during power failure is improved, but use of energy and device complexity increase
Solution Approach 1:
The memory portions are periodically switched between normal operating state and low-power state based on whether data transfer is in progress. During data transfer from volatile to non-volatile memory, affected portions are in normal state while others are in low-power state, reducing overall energy consumption during the backup process.
Solution Approach 2:
The system dynamically adjusts the power state of different memory portions during the backup process. The controller places memory portions into low-power state when not actively transferring data, and transitions them to normal operating state only when needed, optimizing energy usage during power failure scenarios.
4Reliability
If data is transferred one memory portion at a time, then reliability during backup is improved, but productivity decreases
Solution Approach 1:
The volatile memory is divided into multiple memory portions that can be independently managed. During backup, the controller transfers data from one memory portion at a time to the non-volatile memory, ensuring reliable completion of each segment while maintaining overall system functionality. This segmentation allows for better error handling and recovery.
Data Source
AI summary
A memory device for use with a primary power source includes: volatile memory including a plurality of memory portions each of which has a normal operating state and a low-power state; an interface for connecting to a backup power source arranged to temporarily power the volatile memory upon a loss of power from the primary power source; a non-volatile memory; and a controller in communication with the volatile memory and the non-volatile memory programmed to detect a loss of power of the primary power source and in response to move data from the volatile memory to the non-volatile memory at least one memory portion at a time, and while moving data from the volatile memory to the non-volatile memory place the memory portions from which data is being moved into a normal operating state and the memory portions from which data is not being moved into a low-power state.