Flash Memory Block Management via Batched Page Migration

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Solution Overview

Problem

As storage density increases in Multiple Level Cell (MLC) Flash memories, endurance decreases, reading/writing speed slows, and error probability rises, making it difficult for portable memory devices to comply with time-out specifications, particularly in SD standard implementations.

Innovation Solution

A method for managing Flash memory blocks by identifying and isolating blocks with invalid pages, moving valid pages from one block to another in batches, without transferring all valid pages at once, using a controller with a microprocessor and ROM to execute this process, thereby reducing the need for merging operations and enhancing performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If storage density is increased in MLC Flash memories, then storage capacity is improved, but endurance decreases and error probability increases

Engineering Contradiction:
Improvestorage densityVSAvoidendurance
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent segments the block management process into multiple phases: identifying valid pages, sorting them by address, and moving them in batches rather than all at once. This segmentation of the data migration process reduces the time any single operation takes, helping to comply with timeout specifications while managing high-density storage blocks.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary actions by first identifying and sorting valid page addresses before actual data movement begins. This preliminary organization of data enables more efficient batched transfer operations, reducing overall processing time and improving reliability when managing high-capacity blocks.

Inventive Principle:
Principle #10Preliminary action

2Quantity of substance

If storage density is increased in MLC Flash memories, then storage capacity is improved, but reading/writing speed decreases

Engineering Contradiction:
Improvestorage densityVSAvoidreading/writing speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The data movement operation is segmented into multiple batches rather than executed as a single large operation. Each batch processes a subset of valid pages, which reduces the time required for each individual transfer operation and improves overall reading/writing speed in high-density storage environments.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by moving only a portion of valid pages in each operation rather than transferring all valid pages at once. This partial transfer approach reduces operation time per batch, thereby improving speed while still achieving complete data migration eventually.

Inventive Principle:
Principle #16Partial or excessive action

3Quantity of substance

If storage density is increased in MLC Flash memories, then storage capacity is improved, but the probability of reading/writing errors increases

Engineering Contradiction:
Improvestorage densityVSAvoiderror probability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

By segmenting the data migration into smaller batches, the patent reduces the risk of errors in any single operation. If an error occurs during a batch transfer, only that portion is affected, and the operation can be retried without compromising the entire block management process, thus reducing overall error probability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements feedback mechanisms by tracking which valid pages have been moved and monitoring the status of block management operations. This feedback enables the system to detect and correct errors, ensuring data integrity even when managing high-density storage blocks with higher error probabilities.

Inventive Principle:
Principle #23Feedback

4Quantity of substance

If page count per block is increased to enhance storage density, then storage capacity is improved, but compliance with time-out specifications becomes difficult

Engineering Contradiction:
Improvestorage densityVSAvoidtime-out compliance
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent divides the management of high-page-count blocks into segmented batches, where each batch processes a manageable number of pages. This segmentation ensures that individual operations complete within timeout specifications while ultimately handling the entire high-capacity block, thus maintaining compliance despite increased storage density.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by processing only a portion of the pages in each timeout cycle rather than attempting to manage all pages in a single operation. This approach ensures compliance with time-out specifications while progressively managing the entire high-density block over multiple cycles.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS8762623B2Method for managing a plurality of blocks of a flash memory, and associated memory device and controller thereof
Publication Date: 2014.06.24 SILICON MOTION INC
  • US8762623B2 patent drawing
  • US8762623B2 patent drawing
  • US8762623B2 patent drawing

AI summary

A method for managing a plurality of blocks of a Flash memory includes: sieving out at least one first block having invalid pages from the plurality of blocks; and moving data of a portion of valid pages of the first block to a second block, where data of all valid pages of the first block is not moved to the second block at a time. An associated memory device and a controller thereof are also provided, where the controller includes: a ROM arranged to store a program code; and a microprocessor arranged to execute the program code to control the access to the Flash memory and manage the plurality of blocks. The controller that executes the program code by utilizing the microprocessor sieves out the first block from the plurality of blocks, and moves the data of the portion of valid pages of the first block to the second block.