Flash Memory Block Grouping for Staggered Superblock Erasure

The patent divides the superblock erase operation into multiple segments by classifying memory blocks into different groups (first group, second group, third group) with different erase priorities. Instead of erasing all blocks simultaneously, the controller performs segmented erase operations where high-priority blocks are erased first, then medium-priority blocks, and finally low-priority blocks. This segmentation reduces the peak power consumption by staggering the erase operations across different time intervals while still maintaining improved access speed for frequently accessed data.

The patent implements preliminary action by pre-classifying memory blocks into different groups based on their access patterns and erase priorities before the actual erase operation begins. The controller maintains a classification structure that identifies which blocks belong to the first group (high priority), second group (medium priority), or third group (low priority). This preliminary classification is established through monitoring access patterns and is ready before erase operations are needed, thereby reducing the complexity during actual erase operations while still achieving reduced peak power consumption.

The patent maintains continuity of useful action by performing erase operations on multiple memory blocks in parallel within each priority group, rather than sequentially erasing one block at a time. The controller can simultaneously erase multiple blocks in the first group, then simultaneously erase multiple blocks in the second group, and finally simultaneously erase multiple blocks in the third group. This approach maintains high productivity through parallel operations within groups while reducing peak power consumption by staggering operations across groups, thus achieving both goals simultaneously.