Flash Memory Block Remapping for Erase Time Variability
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Solution Overview
Problem
Flash memory devices have variability in erase time across different blocks, limiting their performance and endurance due to the limited number of erase and write cycles, which affects data and code storage efficiency.
Innovation Solution
A remapping circuit or memory management unit dynamically assigns memory blocks based on their erase and programming performance, allocating fast blocks for data storage and slow blocks for code storage, ensuring contiguous allocation and optimizing usage patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If flash memory blocks are used with fixed allocation for data or code storage, then the device structure is simple and easy to manage, but the erase time variability across blocks causes performance degradation and reduced lifespan
Solution Approach 1:
The patent implements dynamic block assignment where the memory management unit (MMU) continuously monitors erase times of flash blocks and reassigns blocks between data and code storage based on current performance characteristics. This dynamic adaptation allows the system to optimize for erase speed when needed while maintaining manageable complexity through automated decision-making algorithms.
Solution Approach 2:
The system changes the assignment parameter (block purpose: data vs. code) based on the measured parameter (erase time). By monitoring erase time variability and adjusting block assignments accordingly, the system transforms a static allocation problem into a dynamic optimization problem that adapts to changing block characteristics over time.
2Speed
If fast erase blocks are always used for data storage, then data access speed is improved, but the limited number of erase cycles reduces the overall lifespan of the memory device
Solution Approach 1:
The patent applies different quality requirements to different memory blocks based on their erase characteristics. Fast-erasing blocks are assigned to data storage where speed is critical, while slower blocks are assigned to code storage where erase speed is less important. This local differentiation optimizes overall system performance while distributing wear across all blocks, extending device lifespan.
Solution Approach 2:
The system dynamically reassigns blocks between data and code storage based on their current erase performance and wear level. When a fast block approaches its erase cycle limit, the MMU transitions it to code storage, allowing slower blocks to handle data operations. This dynamic swapping balances performance requirements with longevity constraints.
3Productivity
If memory blocks are reassigned based on erase time monitoring, then performance is optimized and lifespan extended, but the memory management system becomes more complex
Solution Approach 1:
The memory management unit automatically monitors erase times, determines block performance characteristics, and performs reassignment without external intervention. The system serves itself by implementing closed-loop control where performance data feeds directly into assignment decisions, optimizing memory utilization while managing complexity through automation rather than manual configuration.
Solution Approach 2:
The system implements feedback control by continuously monitoring erase times and using this information to adjust block assignments. The MMU measures actual erase performance, compares it against thresholds, and automatically reassigns blocks to appropriate storage roles. This feedback mechanism optimizes performance while containing complexity through algorithmic decision-making.
Data Source
AI summary
A remapping circuit is connected to a memory. A configuration register is connected to the memory. The configuration register includes performance information for memory blocks in the memory. Also, a system includes a processor, a memory management device is connected to the processor, a display is connected to the processor, a non-volatile memory including a memory blocks is connected to the memory management device, and a register is connected to the non-volatile memory. The memory management device to re-map the non-volatile memory based on information stored in the register.