Flash Cache Controller Block Selection for Wear Reduction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Flash storage used as cache memory experiences rapid degradation and shortened lifespan due to frequent updates, leading to performance drops and reduced lifespan, as existing technologies do not effectively manage cache memory-specific control information.

Innovation Solution

A storage system with a cache controller that uses data attribute information and storage period differences to select optimal blocks for data storage, minimizing the need for data copying and erasure, thereby reducing wear and tear on the flash memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If flash storage is used as cache memory to improve data access speed, then data access performance is improved, but the flash storage experiences rapid degradation and shortened lifespan due to frequent updates

Engineering Contradiction:
Improvedata access speedVSAvoidflash storage lifespan
Core Design Contradiction:
SpeedVSDuration of action of stationary object

Solution Approach 1:

The system performs preliminary actions by predicting which data will be updated soon and proactively migrating such data to the final storage area before actual updates occur. This prevents unnecessary write operations to the cache flash storage, thereby reducing wear and extending its lifespan while maintaining fast access performance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements feedback mechanisms by monitoring update frequencies and access patterns of data in the cache, using this information to dynamically adjust data migration decisions. This feedback loop enables intelligent management of cache contents, optimizing both performance and durability by migrating data that is likely to be updated based on observed patterns.

Inventive Principle:
Principle #23Feedback

2Quantity of substance

If reclamation is performed to create free pages by copying valid data to different blocks, then free pages are created for continued data writing, but read/write performance drops and flash memory degradation accelerates

Engineering Contradiction:
Improvenumber of free pagesVSAvoidread/write performance
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The system performs preliminary migration of data that is predicted to be updated soon, before actual updates occur. This proactive approach creates free pages in advance without requiring costly reclamation operations, thus maintaining read/write performance while ensuring sufficient free pages are available for continued data writing.

Inventive Principle:
Principle #10Preliminary action

3Speed

If data is frequently updated in cache memory to maintain fast access, then data access performance is improved, but the number of erases increases causing flash memory degradation

Engineering Contradiction:
Improvedata access performanceVSAvoidflash memory durability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The system performs preliminary migration of frequently updated data to the final storage area before actual updates occur in the cache. This prevents update operations from being written to the flash storage medium, thereby maintaining fast cache access performance while significantly reducing the number of erase cycles and extending flash memory durability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system monitors update frequencies and access patterns as feedback, using this information to identify candidate data for migration to the final storage area. This feedback-driven approach optimizes the balance between maintaining fast cache performance and protecting flash memory from excessive wear.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9367469B2Storage system and cache control method
Publication Date: 2016.06.14 HITACHI VANTARA LTD
  • US9367469B2 patent drawing
  • US9367469B2 patent drawing
  • US9367469B2 patent drawing

AI summary

A cache memory comprises a cache controller and a nonvolatile semiconductor memory as a storage medium. The nonvolatile semiconductor memory comprises multiple blocks, which are data erase units, and each block comprises multiple pages, which are data write and read units. The cache controller receives data and attribute information of the data, and, based on the received attribute information and attribute information of the data stored in the multiple blocks, selects a storage-destination block for storing the received data, and writes the received data to a page inside the selected storage-destination block.