Flash-Management Cache Eviction Using Partition Access Frequency

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional least recently used (LRU) eviction policy in SSD Flash-Management mapping table caches is sub-optimal as it does not consider the frequency of references to logical block address ranges, leading to undesirable cache swapping and reduced cache hit-rate due to limited cache size.

Innovation Solution

A cache utilization manager tracks partition access frequency and cache access frequency to determine cache eviction candidates, using a modified least recently used score that accounts for both time since last use and frequency of reference, and replaces cache entries based on a cache eviction threshold.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If LRU eviction policy is used, then cache management is simple, but cache hit-rate decreases and cache swapping occurs frequently

Engineering Contradiction:
Improvecache management simplicityVSAvoidcache hit-rate
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent changes the eviction criterion from purely time-based (LRU) to frequency-based by introducing partition access frequency as a new parameter. The cache eviction threshold is defined in terms of partition access frequency, which fundamentally alters how cache entries are selected for eviction and resolves the contradiction between simple management and high hit-rate.

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If cache size is limited, then memory resources are saved, but cache swapping increases and performance deteriorates

Engineering Contradiction:
Improvecache sizeVSAvoidcache performance
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent introduces partition access frequency as a new parameter for cache management decisions. By using frequency-based eviction thresholds rather than fixed-size LRU, the system optimizes cache performance within limited size constraints, allowing better cache entries to be retained and improving overall productivity.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If conventional LRU policy is used, then implementation is straightforward, but frequently accessed partitions may be evicted prematurely

Engineering Contradiction:
Improveimplementation simplicityVSAvoidpartition access frequency consideration
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent modifies the eviction policy by introducing partition access frequency as a critical parameter. The cache eviction threshold is explicitly defined based on partition access frequency, ensuring that frequently accessed partitions are retained in the cache. This parameter change fundamentally improves reliability while maintaining practical implementation through structured frequency tracking and threshold comparison.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10922235B2Method and system for address table eviction management
Publication Date: 2021.02.16 SANDISK TECHNOLOGIES LLC
  • US10922235B2 patent drawing
  • US10922235B2 patent drawing
  • US10922235B2 patent drawing

AI summary

A system and method are disclosed for handling logical-to-physical mapping and increasing the amount of mapping table information that may be stored in a cache in volatile memory. The system includes a storage device having non-volatile memory, an input/output interface, a cache manager, a cache utilization manager, a cache swap manager, and a storage controller configured to service a storage command using a physical address provided by the cache manager. The method includes receiving a storage command comprising a logical address, the logical address comprising a partition identifier, implementing a cache eviction policy in response to determining that a mapping table cache does not have a cache entry that matches the logical address. The method also includes evicting the cache entry with a ranking, or score, that satisfies a cache eviction threshold and loading a replacement cache entry from an address mapping table stores on non-volatile memory.