Flash Memory Cache I/O Throttling by Temperature

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Solid-state flash memory used for secondary caching storage experiences issues with performance and endurance.

Innovation Solution

A system and method for providing a flash memory cache input/output throttling mechanism based on temperature parameters, which selectively routes I/Os to the cache in the solid-state flash memory, restricting caching when temperature thresholds are exceeded to promote improved flash life.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If I/O operations are heavily cached in solid-state flash memory to improve performance, then caching performance is improved, but flash memory endurance deteriorates due to excessive write operations and thermal stress

Engineering Contradiction:
Improvecaching performanceVSAvoidflash memory endurance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements dynamic I/O throttling that adjusts caching behavior based on real-time temperature monitoring. When temperature exceeds thresholds, the system dynamically reduces I/O operations to the flash memory, transforming the static caching approach into an adaptive system that balances performance and reliability based on thermal conditions

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes operational parameters by introducing temperature-based thresholds that control I/O throttling behavior. By monitoring temperature as a key parameter and adjusting caching intensity accordingly, the system optimizes the balance between caching performance and flash memory longevity under varying thermal conditions

Inventive Principle:
Principle #35Parameter changes

2Productivity

If continuous I/O operations are performed to maintain high productivity, then caching performance is improved, but temperature increases causing thermal stress on the flash memory

Engineering Contradiction:
Improvecaching performanceVSAvoidflash memory temperature
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The patent implements a feedback mechanism where temperature sensors continuously monitor flash memory temperature and feed this information back to the I/O throttling controller. This closed-loop system automatically adjusts I/O intensity in response to temperature changes, preventing thermal runaway while maintaining optimal performance within safe thermal limits

Inventive Principle:
Principle #23Feedback

3Speed

If aggressive caching strategies are used to reduce I/O latency, then access speed is improved, but write endurance decreases due to increased write amplification

Engineering Contradiction:
ImproveI/O access speedVSAvoidflash memory write endurance
Core Design Contradiction:
SpeedVSDuration of action of moving object

Solution Approach 1:

The system applies partial caching action by selectively throttling I/O operations based on temperature conditions rather than maintaining full caching intensity continuously. This partial action approach reduces write amplification and thermal stress during high-temperature periods while maintaining aggressive caching when thermal conditions permit, thereby extending flash memory write endurance

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS9053036B2System and method for providing a flash memory cache input/output throttling mechanism based upon temperature parameters for promoting improved flash life
Publication Date: 2015.06.09 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US9053036B2 patent drawing
  • US9053036B2 patent drawing
  • US9053036B2 patent drawing

AI summary

Aspects of the disclosure pertain to a system and method for providing a flash memory cache input/output throttling mechanism based upon temperature parameters for promoting improved flash life. The mechanism restricts flash memory cache caching of inputs/outputs associated with Least Recently Used data and Most Recently Used data when a temperature of the flash memory is at or above a threshold temperature.