Flash Memory Cell Rewriting for Selective Error Refresh
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Solution Overview
Problem
The frequent refresh processes in flash memory modules lead to rapid deterioration, reducing the lifespan of miniaturized and multi-valued NAND flash memories, as they require frequent erasure and rewriting, which affects data reliability.
Innovation Solution
A flash memory module with a controller that monitors data reliability and selectively corrects error bits by rewriting threshold voltage levels in specific cells, reducing the need for frequent erasure and extending the module's lifespan.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If frequent refresh processes are executed to maintain data reliability, then data reliability is improved, but flash memory lifespan deteriorates due to increased erasure cycles
Solution Approach 1:
The patent applies partial action by executing refresh operations selectively only on storage areas where error bits have been detected, rather than performing periodic refresh on all data. The controller monitors error bit rates and triggers refresh only when the error bit rate exceeds a threshold, thereby reducing the total number of erasure cycles while maintaining data reliability where needed.
Solution Approach 2:
The patent implements feedback by continuously monitoring error bit rates in storage areas and using this information to dynamically control refresh operations. The controller detects error bits during read operations, calculates error bit rates, and adjusts refresh execution accordingly - refreshing only when error rates indicate degradation, thus optimizing the balance between reliability maintenance and lifespan extension.
2Reliability
If refresh process is executed periodically to correct error bits, then data reliability is maintained, but the number of erasure cycles increases leading to faster deterioration
Solution Approach 1:
The patent applies partial action by executing refresh operations selectively only on storage areas where error bits have been detected, rather than performing periodic refresh on all data. The controller monitors error bit rates and triggers refresh only when the error bit rate exceeds a threshold, thereby reducing the total number of erasure cycles while maintaining data reliability where needed.
Solution Approach 2:
The patent applies self-service by enabling the flash memory system to automatically detect and correct its own errors through monitored error bits. The controller continuously monitors error bit rates and autonomously decides when refresh is necessary, eliminating the need for external intervention or conservative periodic refresh schedules, thus reducing unnecessary erasure cycles.
3Quantity of substance
If miniaturization and multi-valued cells are used to reduce cost and increase capacity, then storage density is improved, but error bit rate increases due to electron movement sensitivity
Solution Approach 1:
The patent implements feedback by continuously monitoring error bit rates in storage areas and using this information to dynamically control refresh operations. The controller detects error bits during read operations, calculates error bit rates, and adjusts refresh execution accordingly - refreshing only when error rates indicate degradation, thus optimizing the balance between reliability maintenance and lifespan extension.
Solution Approach 2:
The patent applies parameter changes by monitoring the threshold voltage levels of cells and detecting when they drift outside acceptable ranges due to electron movement. The system adjusts by triggering refresh operations that re-program cells with shifted threshold voltages, thereby correcting error bits caused by the sensitivity of miniaturized multi-valued cells while maintaining their high storage density advantages.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach maintains data reliability while extending the lifespan of flash memory modules by minimizing the frequency of refresh processes and reducing cell deterioration.
Implementation Method 1
The FM has a cell storing electrons, and holds a value by associating the number of the electrons injected in the cell with a bit value of data
Implementation Method 2
the flash memory injects an electron into the first cell based on a threshold voltage indicated by the rewrite correction target cell data
Data Source
AI summary
A flash memory module includes a flash memory and a controller. The controller acquires information indicating reliability of monitoring target data of the flash memory, specifies a first cell, which is a cell having a threshold voltage level lower than a threshold voltage level of a corresponding cell in expected value data obtained by correcting an error bit of the monitoring target data, among cells in which error bits have occurred of the monitoring target data when it is determined that the reliability indicated by the acquired information is lower than a predetermined condition, and transmits rewrite correction target cell data, which is data corresponding to data of the first cell in the expected value data, to the flash memory. The flash memory injects an electron into the first cell based on a threshold voltage indicated by the rewrite correction target cell data.