Flash Cell Reference Array for PVT and Aging Compensation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Flash memory cells experience significant variations due to Process, Voltage, and Temperature (PVT) fluctuations and aging mechanisms, leading to threshold voltage drift and changes in cell characteristics, which affect their current output and limit their application in analog operations.
Innovation Solution
A system is implemented that includes a reference flash cell array, a reference current, and a reference array bit-line driver system to generate a reference voltage and maintain a consistent bit-line voltage, using a diode-connected reference array to compensate for PVT and aging effects by adjusting the control gate voltage to maintain constant current levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If flash memory cells are used for analog operations, then multi-threshold voltage storage capability is utilized, but PVT variations cause current output deviation and reduce reliability
Solution Approach 1:
The patent implements a feedback mechanism where a reference flash cell array generates reference voltages that are fed back to compensate for PVT variations in the main flash cell array. The reference array experiences the same PVT conditions and generates compensating voltages that offset the variations, thereby maintaining stable current output for analog operations.
Solution Approach 2:
The patent changes the voltage parameter dynamically by generating reference voltages (Vref1, Vref2, etc.) that are applied to the control gates of flash cells. These reference voltages are adjusted based on the actual PVT conditions to compensate for threshold voltage drift and maintain consistent current output despite process, voltage, and temperature variations.
2Reliability
If reference flash cell array is added for compensation, then PVT and aging compensation is achieved, but device complexity increases
Solution Approach 1:
The patent uses a simplified copy approach where a reference flash cell array with the same structure as the main array is used to generate reference voltages. Instead of complex compensation circuits, the system copies the reference voltages from the reference array to the main array, achieving compensation with minimal additional complexity.
Solution Approach 2:
The reference flash cell array serves multiple functions: it generates reference voltages for compensation, tracks PVT variations, and provides aging compensation. This multi-functionality reduces the need for separate compensation circuits and minimizes the overall device complexity while achieving reliable PVT and aging compensation.
Data Source
AI summary
In one aspect, a system is configured for managing a change in cell characteristics due to process, voltage, temperature and aging of cells as well as any local variations of a flash cell array, comprising: a flash cell array subject to characteristic change and or local variation issue; a reference system comprising: a reference flash cell array comprising an “N” number of flash cells configured to overcome the characteristic change and or local variation issue by generating a reference voltage (CG_ref) that is applied to track the cell changes and local variations of the flash cell array; a reference current (I_ref) that is injected into the reference flash cell array to enable the reference array system to track the flash cell array; and a reference array bit-line driver system that maintains a same bit-line voltage (bl_ref) of both the flash cell array and the reference flash cell array; and a flash-cell current receiving unit coupled with the flash cell array and configured to receive the same bit-line voltage (bl_ref) of both the flash cell array and the reference flash cell array.