Flash Memory Charge-Level Control for Multi-Level Cell Reliability
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Solution Overview
Problem
Conventional flash memory technologies using multiple data levels per cell are prone to errors during read and write operations and are limited to storing data levels corresponding to even powers of two, which restricts their capacity and reliability.
Innovation Solution
The system employs a flash memory configuration with programmable target charge levels for each memory cell, allowing for non-integer power of two data values and includes error correction mechanisms to compensate for performance variations in cell array devices, using a controller to manage charge tiers and apply compensation during operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple data levels are stored within a single memory cell to increase storage capacity, then data storage capacity is improved, but error proneness during read and write operations increases
Solution Approach 1:
The patent applies parameter changes by making the number of data levels programmable rather than fixed. The controller can dynamically adjust the number of levels stored per cell based on performance characteristics and error rates, allowing optimization between storage capacity and reliability. This resolves the contradiction by enabling the system to adapt the data levels parameter to achieve desired capacity while maintaining acceptable error rates through compensation mechanisms.
Solution Approach 2:
The patent implements feedback through performance characteristic measurement and compensation. The system measures actual performance characteristics of memory cells, compares them against target values, and applies compensation to correct deviations. This feedback loop enables the system to maintain reliability even when storing multiple data levels per cell, as errors and performance variations are continuously monitored and corrected.
2Device complexity
If conventional flash memory is limited to even power of two data levels, then device complexity is reduced, but storage capacity is restricted
Solution Approach 1:
The patent applies dynamics by transitioning from static, fixed data level configurations to dynamic, programmable configurations. The number of data levels per cell can be changed through programming instructions rather than being hard-coded into the device architecture. This allows the system to optimize storage capacity on-demand without increasing fundamental device complexity, as the flexibility is achieved through software-controlled parameters rather than hardware complexity.
Solution Approach 2:
The patent changes the parameter of data levels from fixed even powers of two to programmable values. This allows non-traditional configurations such as 7 levels per cell (instead of 4 or 8) to be implemented, thereby increasing storage capacity without requiring fundamentally more complex device architecture. The parameter change is achieved through programmable control logic that can accommodate arbitrary numbers of levels.
3Adaptability or versatility
If performance characteristics vary between different cell array devices, then device adaptability is improved, but measurement precision and error correction difficulty increase
Solution Approach 1:
The patent uses feedback to measure actual performance characteristics of each cell array device and apply device-specific compensation. By measuring threshold voltage shifts, charge retention rates, and other performance parameters, the system generates compensation values tailored to each device's characteristics. This feedback mechanism enables precise measurement and correction despite variations between devices, maintaining measurement accuracy while accommodating diverse hardware.
Solution Approach 2:
The patent applies preliminary action by performing calibration and performance characterization before normal data storage operations. During initialization, the system measures performance characteristics and pre-calculates compensation values that are stored and applied during subsequent operations. This preliminary characterization enables the system to account for device variations before they affect data integrity, improving measurement precision through advance preparation.
Data Source
AI summary
A method and system for storing and retrieving data using flash memory devices. One example system includes an apparatus within a flash memory configuration. The flash memory configuration includes a plurality of memory cells, where each memory cell has a charge storage capacity for use in implementing digital storage. The apparatus includes a processing arrangement configured to access each of the memory cells in a write operation and a read operation. The apparatus also includes an instruction set for instructing the processor to impose target charge levels for defining a plurality of data values for each of the memory cells. The target charge levels are programmably movable with respect to the charge storage capacity.