Flash Memory Arithmetic Coding with Parallel Rescaling
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Solution Overview
Problem
Current arithmetic coding methods for NAND flash memory devices are inefficient in terms of speed and require significant time for a single iteration, which hampers the performance of portable memory devices.
Innovation Solution
The method involves parallel calculation of rescaling and range parameters, with new parameters (iH and iL) determined based on cumulative frequency, and subsequent shifting to optimize the arithmetic encoding and decoding process, allowing for faster iterations by performing rescaling within one clock cycle without the need for loops.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional arithmetic coding methods are used for NAND flash memory, then encoding/decoding functionality is provided, but the operation speed is slow and iteration time is excessive
Solution Approach 1:
The patent pre-calculates and stores cumulative frequency tables for all possible symbol sequences before actual encoding/decoding operations. This preliminary preparation allows the arithmetic coding to directly lookup and apply pre-computed values during iteration, eliminating complex runtime calculations and significantly reducing iteration time while maintaining encoding/decoding functionality
Solution Approach 2:
The patent divides the arithmetic coding process into separate lookup table operations for different symbol positions. By segmenting the cumulative frequency calculations into pre-computed tables indexed by symbol position and value, the system can rapidly retrieve encoding/decoding parameters without performing full arithmetic calculations during each iteration, thereby improving speed and reducing time loss
2Adaptability or versatility
If arithmetic coding is implemented for large alphabets in NAND flash memory, then coding capability is provided, but the complexity of rescaling operations increases
Solution Approach 1:
The patent pre-computes cumulative frequency tables for all possible symbol values in the large alphabet before operation. These tables are stored in memory and indexed by symbol position and value, allowing the system to handle large alphabets efficiently during encoding/decoding without performing complex rescaling calculations in real-time, thus maintaining adaptability while reducing operational complexity
Solution Approach 2:
The patent introduces cumulative frequency lookup tables as intermediary structures between the input symbols and the arithmetic coding operations. These tables serve as mediators that translate large-alphabet symbols into pre-computed frequency values, simplifying the rescaling operations required for large alphabets and reducing the computational complexity of the coding process
Data Source
AI summary
A method for reducing an amount of time needed for a single iteration of arithmetic encoding and arithmetic decoding is provided. Rescaling and range are calculated in parallel, range being a High parameter bound of a symbol-interval—a Low parameter bound of the symbol-interval+1. A new iHigh (iH) parameter and a new iLow (iL) parameter or a given/decoded symbol is found according to a cumulative frequency for an ith symbol. iH parameter and iL parameter rescaling is performed by shifting an amount of most significant bits of iH, iL in accordance with values of iH and iL. iRange is shifted to the left in accordance with a number of digits needed to represent iRange and a total number of bits reserved for iRange. A shifted iRange is divided by CF[N] and saved to Step_tmp while awaiting a result of H,L rescaling.