Flash Command Reporting Cell Program Failure Counts

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Solution Overview

Problem

Conventional flash memory systems lack adequate reporting of cell program failures, especially as flash memory density increases and cell size decreases, leading to a need for more sophisticated error correction capabilities, but current methods are inefficient and costly due to simple failure reporting.

Innovation Solution

Implementing a flash command that reports a count of cell program failures, allowing for per-chunk error reporting and leveraging existing flash memory information without triggering additional read operations, enabling the controller to tolerate or reprogram errors based on thresholds.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional flash memory reporting methods are used, then the system is simple to operate, but the error information reporting is insufficient for high-density memory

Engineering Contradiction:
Improveerror information reporting precisionVSAvoidcommand structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the error reporting by dividing the memory into chunks and reporting the number of failed cells per chunk rather than providing a single aggregate status. This segmentation allows the controller to identify specific problem areas within the memory array, enabling targeted error correction while maintaining manageable command structures.

Inventive Principle:
Principle #1Segmentation

2Reliability

If simple program failure reporting is used, then the controller operation is straightforward, but memory that could be usable is discarded due to errors

Engineering Contradiction:
Improvememory usabilityVSAvoiderror handling complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the parameter being reported from a binary success/failure status to a quantitative count of failed cells per chunk. This parameter change enables the controller to apply threshold-based decision-making, where memory blocks with error counts below a certain threshold can be recovered through ECC correction rather than being discarded entirely.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If detailed error counting is implemented, then error correction capability is improved, but the command and status reporting becomes more complex

Engineering Contradiction:
Improveerror correction capabilityVSAvoidcommand simplicity
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent implements a universal polling status command structure that can report both traditional pass/fail status and detailed error counts using the same command interface. This multi-functionality allows the system to maintain ease of operation for simple cases while providing detailed error information when needed, without requiring separate complex command sets.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10153052B2Flash command that reports a count of cell program failures
Publication Date: 2018.12.11 SEAGATE TECH LLC
  • US10153052B2 patent drawing
  • US10153052B2 patent drawing
  • US10153052B2 patent drawing

AI summary

An apparatus comprises a memory and a controller. The memory configured to store data. The memory may comprise a write buffer and a plurality of memory dies. Each memory die may have a size less than a total size of the memory and include a plurality of cells. The memory may perform a program operation to write to and verify one or more of the plurality of cells in response to receiving a program command. The controller may be configured to issue the program command to program the plurality of memory dies and to issue the polling status command after issuing the program command to obtain a number of the cells that failed to be verified during the program operation. In response to the polling status command received from the controller, the memory reports a count of a number of bit-lines not having an inhibited state in the write buffer.