Flash Controller ECC Layout for Compressed Data Error Correction

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Solution Overview

Problem

Flash memory technologies face increasing bit error rates due to memory wear and scaling issues, necessitating more efficient error detection and correction schemes without additional costs or performance impact, especially for compressed data storage.

Innovation Solution

The method involves compressing data according to a compression scheme, forming data stacks with fixed sizes, encoding with error correction codes in multiple dimensions, and using a flash controller to generate and encode data packs in equal sizes, facilitating error correction across multiple dimensions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If data is compressed before storage to increase storage capacity, then storage efficiency is improved, but error detection and correction becomes more difficult

Engineering Contradiction:
Improvestorage capacityVSAvoiderror detection difficulty
Core Design Contradiction:
Quantity of substanceVSDifficulty of detecting and measuring

Solution Approach 1:

The patent applies error correction encoding to the compressed data before storage, rather than attempting to correct errors after decompression. This preliminary action on the compressed data allows the system to handle errors more efficiently without requiring additional storage overhead, as the encoding is performed on the already-compressed bitstream.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent organizes compressed data into fixed-size stacks with specific structures, applying error correction codes locally to manageable segments rather than treating the entire compressed data stream uniformly. This local approach allows for targeted error correction while maintaining storage efficiency.

Inventive Principle:
Principle #3Local quality

2Reliability

If traditional ECC schemes are used on compressed data, then error correction capability is improved, but storage overhead and complexity increase

Engineering Contradiction:
Improveerror correction capabilityVSAvoidencoding complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides compressed data into fixed-size stacks of predetermined dimensions, organizing them into a structured array format. This segmentation allows error correction codes to be applied systematically to manageable segments, reducing the computational complexity compared to processing entire compressed data streams.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transforms the compressed data from a continuous bitstream into discrete fixed-size stacks with specific dimensional parameters. This parameter change enables the application of error correction codes in a structured manner, improving reliability while maintaining manageable complexity through standardized processing units.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If larger ECC codes are used to handle higher bit error rates from memory wear, then reliability is improved, but storage space and processing time are consumed

Engineering Contradiction:
Improvebit error rate handlingVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

By segmenting compressed data into fixed-size stacks, the patent enables parallel processing of error correction across multiple independent segments. This segmentation allows the system to apply robust error correction codes to each segment without requiring sequential processing of the entire data set, thereby maintaining processing speed while improving reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies error correction encoding to only the necessary portions of compressed data organized in fixed-size stacks, rather than applying excessive correction mechanisms to the entire data stream. This partial action approach provides sufficient error correction capability for handling memory wear while avoiding unnecessary processing overhead.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11385962B2Method and apparatus for error correction encoding compressed data
Publication Date: 2022.07.12 HANGZHOU HUALAN MICROELECTRONICS CORP
  • US11385962B2 patent drawing
  • US11385962B2 patent drawing
  • US11385962B2 patent drawing

AI summary

Designs of controllers for flash memory array are described. A controller is designed to form data packs of a predefined size with compressed data segments in different sizes. The data packs are encoded with ECC in two dimensions. When the data packs are read out, the ECC is applied in two dimensions to detect and correct errors that can be corrected by the ECC.