Flash Memory Controller Error Correction via Hard and Soft Decoding Switch

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Solution Overview

Problem

Existing methods for managing access to multiple level cell (MLC) flash memory fail to achieve a desirable balance between performance and system resource usage, leading to instability and inefficiencies.

Innovation Solution

A method involving a controller that performs error correction by conducting a read operation, re-reading data with specific retry parameters, temporarily storing it in volatile memory for hard decoding, and subsequently using soft decoding to correct errors, allowing dynamic switching between decoding methods to optimize performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If hard decoding is performed repeatedly with different retry parameters, then error correction capability is improved, but system resource usage and processing time increase

Engineering Contradiction:
Improveerror correction capabilityVSAvoidsystem resource usage
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system dynamically switches between hard decoding and soft decoding modes based on error detection results. After initial hard decoding failures, the system transitions to soft decoding which uses probabilistic information from multiple read attempts, optimizing the balance between correction capability and resource consumption without requiring exhaustive retry parameter configuration

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the decoding parameter from binary hard decisions to probabilistic soft decisions. By storing read data in volatile memory and using soft decoding algorithms that process multiple read attempts with different parameters, the system achieves better error correction without linearly increasing resource usage for each retry parameter combination

Inventive Principle:
Principle #35Parameter changes

2Reliability

If multiple read retry operations are performed with different parameters, then data reliability is improved, but processing time increases

Engineering Contradiction:
Improvedata reliabilityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary hard decoding with standard parameters first. Only when hard decoding fails does it proceed to soft decoding using data stored from previous read attempts. This preliminary action filters out easily correctable errors quickly while reserving complex processing for only the most difficult error cases

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Volatile memory serves as an intermediary buffer that stores read data between hard decoding attempts and soft decoding operations. This allows the soft decoding process to access previously read data without performing additional time-consuming read operations from the flash memory, reducing overall processing time

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If retry parameters are configured for each soft decoding operation, then decoding accuracy is improved, but system complexity and configuration overhead increase

Engineering Contradiction:
Improvedecoding accuracyVSAvoidconfiguration overhead
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The soft decoding process automatically utilizes read data from previous hard decoding attempts without requiring manual configuration of retry parameters. The system self-manages the decoding strategy by detecting hard decoding failures and automatically transitioning to soft decoding with appropriate parameter settings, eliminating configuration overhead

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9405619B2Method for performing error correction, associated memory apparatus and associated controller thereof
Publication Date: 2016.08.02 SILICON MOTION INC
  • US9405619B2 patent drawing
  • US9405619B2 patent drawing
  • US9405619B2 patent drawing

AI summary

A method for performing error correction, an associated memory apparatus and an associated controller thereof are provided. The data used in a hard decoding period can be wholly or partially reserved, and the reserved data can be used in a soft decoding period. For example, a read operation is performed at a specific physical address of a flash memory; after an uncorrectable error of the read operation is detected, a re-read operation is performed at the specific physical address of the flash memory to obtain first data and temporarily store the first data into a volatile memory, and a hard decoding operation is performed on the first data; and after decoding failure of the hard decoding operation is detected, a soft decoding operation is performed according to the first data read from the volatile memory to perform error correction corresponding to the specific physical address.